EPM3256ATC144-7 vs EPM3256ATC144-7N 比較

詳細並排比較 EPM3256ATC144-7 由 Altera 與 EPM3256ATC144-7N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EPM3256ATC144-7N EPM3256ATC144-7N - MAX 3000A CPLD 256 Macro 7.5ns | Altera

EPM3256ATC144-7N - MAX 3000A CPLD 256 Macro 7.5ns | Altera

EPM3256ATC144-7N ⚠ 最後購買機會

規格比較

參數 EPM3256ATC144-7 EPM3256ATC144-7N
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete 最後購買
Family MAX 3000A MAX 3000A
Macrocells 256 —
User I/Os 116 116
Logic Elements / Gates 600 to 10,000 usable gates —
Propagation Delay (tPD) 7.5 ns 7.5 ns
Counter Frequency (fCNT) 227.3 MHz —
Speed Grade -7 —
Supply Voltage - Core (VCCINT) 3.3 V —
Supply Voltage - I/O (VCCIO) 2.5 V / 3.3 V / 5.0 V —
In-System Programming IEEE Std. 1532 compliant, 3.3 V ISP —
封裝 TQFP-144 (LFQFP, gull-wing) 144-pin TQFP
工作溫度 0C to +70C (Commercial) 0C to +70C (Commercial)
腳位數 144 —
安裝類型 Surface Mount Surface Mount
PCI Compliance PCI Local Bus Specification Revision 2.2 (speed grades -4 to -10) —
JTAG Support IEEE Std. 1149.1 boundary-scan IEEE 1149.1 boundary-scan
Device Type — CPLD - Complex Programmable Logic Device
Macro Cells — 256
Logic Gates (usable) — 5,000
Number of Logic Array Blocks (LABs) — 16
Maximum Internal Frequency — 126.6 MHz
Supply Voltage (VCCIO) — 3.0 V to 3.6 V
Programmable Logic Technology — CMOS EEPROM-based
In-System Programmable (ISP) — Yes (3.3 V)
Logic Family — CMOS
RoHS 狀態 — Compliant

資料表與資源

瀏覽所有產品 建立 BOM 索取報價