EPM3512AFC256-7 vs EPM3512AFC256-10N 比較

詳細並排比較 EPM3512AFC256-7 由 Intel 與 EPM3512AFC256-10N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Intel
EPM3512AFC256-7 EPM3512AFC256-7 - 512-Macrocell MAX 3000A CPLD, 7.5ns, BGA-256 | Intel

EPM3512AFC256-7 - 512-Macrocell MAX 3000A CPLD, 7.5ns, BGA-256 | Intel

EPM3512AFC256-7 ⚠ 最後購買機會

規格比較

參數 EPM3512AFC256-7 EPM3512AFC256-10N
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 最後購買 Obsolete
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) —
Macrocells 512 512
Logic Array Blocks (LABs) 16 [DATA_NEEDED: number of LABs]
User I/O Pins 212 208
Usable Gates 10,000 10000
Pin-to-Pin Logic Delay 7.5 ns —
Counter Frequency (max) 227.3 MHz —
Supply Voltage - Core (VCCINT) 3.0 V to 3.6 V (3.3 V typ.) —
I/O Voltage (VCCIO) 5.0 V / 3.3 V / 2.5 V (MultiVolt) —
封裝 256-ball FineLine BGA (FBGA-256) 256-ball FBGA (17 mm x 17 mm)
Programming EEPROM, IEEE 1149.1 JTAG ISP (IEEE 1532-compliant) —
工作溫度 [DATA_NEEDED: operating temperature grade] —
安裝類型 Surface Mount Surface Mount (BGA)
RoHS 狀態 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Configuration Memory Non-volatile EEPROM —
Operating Frequency (fMAX) — [DATA_NEEDED: fMAX MHz]
Pin-to-Pin Delay (tPD) — 10 ns
Setup Time (tSU) — 4.5 ns
VCCINT (Core Supply) — 3.3 V
VCCIO (I/O Supply) — 3.3 V or 2.5 V
Technology — CMOS EEPROM-based, non-volatile
Operating Temperature (Commercial) — 0 C to +70 C
ISP Interface — IEEE Std. 1149.1 JTAG, IEEE Std. 1532
MSL 等級 — [DATA_NEEDED: MSL rating]

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