EPM5032DC vs EPM5032DM883B 比較
詳細並排比較 EPM5032DC 由 Altera 與 EPM5032DM883B 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5032DC | EPM5032DM883B |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 (Classic EPLD) |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Macrocells | 32 | 32 |
| Logic Array Blocks (LABs) | 1 | — |
| 封裝 | DIP-24 (ceramic, windowed) | — |
| Speed Grade | DC (commercial) | — |
| 工作溫度 | 0C to +70C | MILITARY (per /883B screen) |
| Technology | Bipolar EPROM, UV-erasable | UV-erasable EPROM cell |
| Programmable Logic Elements | AND array + fixed OR array per macrocell | — |
| Configuration Memory | EPROM (UV-erasable via package window) | — |
| 安裝類型 | Through-hole (DIP) | Through-Hole |
| 腳位數 | 24 | 28 |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: lead-bearing ceramic; likely non-compliant] |
| Programming Tool | Altera MAX+PLUS II / A+PLUS legacy | — |
| 生命週期狀態 | Obsolete (mature legacy) | — |
| Logic Elements | — | 32 macrocells (MAX architecture) |
| Propagation Delay (tPD) | — | [DATA_NEEDED: tPD in ns] |
| Maximum Counter Frequency (fCNT) | — | [DATA_NEEDED: fCNT in MHz] |
| Supply Voltage (VCC) | — | 5 V (nominal, TTL-compatible I/O) |
| MIL-STD-883 Screening | — | Class B (DM/883B) |
| Package Type | — | WDIP-28 (ceramic DIP with quartz window) |
| Terminal Form | — | Through-Hole |
| Package Shape | — | RECTANGULAR |
| Programming Method | — | Programmer + UV erase |