EPM5064JI-1 vs EPM5064LI 比較
詳細並排比較 EPM5064JI-1 由 Intel 與 EPM5064LI 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5064JI-1 | EPM5064LI |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (Erasable Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 64 | 64 |
| User I/O Pins | [DATA_NEEDED: user I/O count from datasheet] | — |
| 封裝 | 68-pin PLCC (windowed ceramic) | — |
| Logic Elements | [DATA_NEEDED: total logic elements] | — |
| Propagation Delay (tPD) | [DATA_NEEDED: combinational tPD from datasheet] | 55 ns (typical) |
| 供應電壓 | 5 V | — |
| 工作溫度 | [DATA_NEEDED: commercial vs industrial grade temp range] | — |
| Process Technology | CMOS, UV-erasable | 1-micron EPIC CMOS |
| Speed Grade | JI-1 (commercial, -10/-12/-15 family) | — |
| Programmability | UV-erasable (windowed package) | — |
| Data Retention | 25 years (per MAX 5000 datasheet) | — |
| 安裝類型 | Surface Mount | Surface Mount |
| RoHS 狀態 | [DATA_NEEDED: not stated in provided data] | [DATA_NEEDED: confirm RoHS status - legacy Altera part] |
| Logic Array Blocks (LABs) | — | 4 |
| Number of Terminals | — | 44 |
| Package Code | — | QCCJ (PLCC-44, J-bend) |
| Package Shape | — | Square |
| Configuration Memory | — | UV-Erasable / OTP (EPROM-based) |
| Supply Voltage (VCC) | — | 4.5 V to 5.5 V |
| Operating Temperature Grade | — | Industrial |
| 最大時脈頻率 | — | 33.3 MHz |
| I/O Pins | — | 28 bidirectional |
| Dedicated Inputs | — | 7 |
| Total User Inputs | — | 36 |
| Latch-up Immunity | — | 500 mA typical at 125 C |