EPM5064LC vs EPM5128GC-1 比較
詳細並排比較 EPM5064LC 由 Altera 與 EPM5128GC-1 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5064LC | EPM5128GC-1 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | CPLD (Complex Programmable Logic Device) | UV-erasable CMOS CPLD |
| Programming Type | OTP (One-Time-Programmable, UV-erasable EPROM) | — |
| Macro Cells | 64 | — |
| Usable Gates | 1.25K | 2,500 |
| Logic Array Blocks (LABs) | 4 | — |
| Propagation Delay (tPD) | 55 ns | 16 ns (typical, -1 speed grade) |
| Total Inputs | 36 (7 dedicated + 29 I/O) | — |
| I/O Pins | 28 bidirectional + 4 dedicated input | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | — |
| 工作溫度 | 0C to +70C (Commercial) | -40C to +85C (industrial) |
| 封裝 | PLCC-44 (LCC-44, J-lead) | PGA-96+ (Pin Grid Array, ceramic windowed) |
| Process Technology | CMOS EPROM | — |
| 安裝類型 | Surface Mount | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status - pre-RoHS legacy part, likely non_compliant] | [DATA_NEEDED: RoHS compliance - ceramic PGA part is legacy] |
| Lead Free | [DATA_NEEDED: lead-free status] | — |
| Macrocells | — | 128 |
| Dedicated Inputs | — | 7 |
| Maximum User I/O Pins | — | 52 |
| Nominal Supply Voltage | — | 5 V |
| Supply Voltage Range | — | 4.75 V to 5.25 V |
| Maximum Operating Frequency | — | 62.5 MHz |
| Technology | — | CMOS, UV-erasable EPROM |
| IOL / IOH | — | 100 mA / 25 mA per pin (legacy figure, [DATA_NEEDED: verify exact drive spec]) |
| Security Bit | — | Programmable, prevents readback |
| Programming Method | — | UV erase + EPROM program (or device programmer) |
| MSL 等級 | — | [DATA_NEEDED: MSL level] |