EPM5128JI vs EPM5130JI 比較
詳細並排比較 EPM5128JI 由 Intel 與 EPM5130JI 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5128JI | EPM5130JI |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Device Family | MAX 5000 | — |
| Device Type | UV-erasable programmable logic device (PLD) | UV-Erasable EPLD (CMOS EPROM) |
| Macrocells | 128 | 128 |
| Propagation Delay (tPD) | 55 ns (typical) | 55 ns |
| Maximum Internal Frequency | 40 MHz | — |
| Process Technology | CMOS | 0.75 micron CMOS EPROM |
| Programmable Technology | UV-erasable EPROM cell | — |
| 封裝 | 68-terminal ceramic CQCC, windowed, J-leads | — |
| Operating Temperature Grade | Industrial ("I" suffix) | — |
| Programming | Altera MAX+plus II compatible programmer + UV eraser | — |
| RoHS 狀態 | Non-compliant (ceramic hermetic package) | Non-compliant (contains Pb in ceramic package) |
| Lead Finish | Tin-lead (SnPb) over nickel | — |
| 安裝類型 | Surface Mount (J-lead CQCC) | — |
| Logic Blocks | [DATA_NEEDED: number of LABs / logic array blocks] | — |
| User I/O Pins | [DATA_NEEDED: pin count of user I/Os] | — |
| 供應電壓 | [DATA_NEEDED: VCC range] | 5 V (typical) |
| Standby Current | [DATA_NEEDED: ICCSB] | — |
| Family | — | MAX 5000 |
| Logic Array Blocks (LABs) | — | 8 |
| 最大時脈頻率 | — | 33.3 MHz |
| External Clock Inputs | — | 1 (shared input/clock) |
| Interconnect | — | Programmable Interconnect Array (PIA) |
| Input Logic Standard | — | TTL-compatible |
| Package Type | — | Ceramic J-Leaded Chip Carrier (JLCC) with UV window |
| 工作溫度 | — | Commercial (0C to +70C) |
| Program/Erase Method | — | UV erasure through quartz window |
| Lifecycle | — | Obsolete - EOL by Altera/Intel |