EPM5128LC2 vs EPM5128GC-2 比較

詳細並排比較 EPM5128LC2 由 Altera 與 EPM5128GC-2 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EPM5128LC2 EPM5128LC2 - 128-Macrocell MAX 5000 CPLD, 45ns, 5V | Altera

EPM5128LC2 - 128-Macrocell MAX 5000 CPLD, 45ns, 5V | Altera

EPM5128LC2 ⚠ 最後購買機會

規格比較

參數 EPM5128LC2 EPM5128GC-2
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 最後購買 Obsolete
Family MAX 5000 MAX 5000
Device Type CPLD (Complex Programmable Logic Device) —
Macrocells 128 128
Logic Array Blocks (LABs) 8 —
Interconnect Programmable Interconnect Array (PIA) —
Global Clock Inputs 1 dedicated —
Propagation Delay (tPD) 45 ns Approx. 25 ns (typical, -2 speed grade)
Supply Voltage (VCC) 5 V 5 V (nominal)
Process Technology CMOS EPROM —
Configuration Memory On-chip EPROM (non-volatile) Non-volatile, one-time programmable (erasable via UV)
Boundary Scan JTAG / IEEE 1149.1 —
工作溫度 -40 C to +85 C (extended commercial) 0C to +70C (commercial)
封裝 PGA (Pin Grid Array, ceramic) —
安裝類型 Through-Hole / Socketed —
RoHS 狀態 [DATA_NEEDED: RoHS status] —
Logic Elements / Gates — 2,500 usable gates
Number of Usable Gates — 2,500
Maximum Operating Frequency — 50 MHz
Package Type — 68-pin PGA (Pin Grid Array)
Package Code (per Partstack) — WPGA
Number of Terminals — 68
Programming Technology — UV-erasable EPROM
Grade (per Partstack) — COMMERCIAL
Terminal Form — PIN/PEG

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