EPM5130WC-1 vs EPM5130WC-2 比較
詳細並排比較 EPM5130WC-1 由 Intel 與 EPM5130WC-2 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Intel
EPM5130WC-1 - 128-Macrocell 40ns UV CPLD, 100-pin CQFP | Intel (Altera) MAX 5000
EPM5130WC-1 Obsolete規格比較
| 參數 | EPM5130WC-1 | EPM5130WC-2 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Series | MAX 5000 | — |
| Manufacturer | Altera (now Intel) | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocell Count | 128 | 128 |
| Logic Array Blocks | Multiple LABs (per MAX 5000 architecture) | — |
| Propagation Delay (tpd) | 40 ns | — |
| 最大時脈頻率 | 50 MHz | — |
| Erasure Method | UV (ultraviolet, windowed package) | — |
| Process Technology | CMOS EPROM | CMOS |
| User I/O Pins | Up to 100 | — |
| Package Type | 100-pin Ceramic QFP (Windowed) | 100-terminal Ceramic CQFP (R-CQFP-G100), windowed, gull-wing |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | 0 °C to 70 °C (Commercial) |
| 供應電壓 | [DATA_NEEDED: VCC nominal] | — |
| Programmable | Yes (UV-erasable, non-volatile) | — |
| Logic Family | MAX 5000 (Altera) | — |
| Configuration Memory | EPROM (on-chip) | UV-erasable CMOS EEPROM cells |
| 安裝類型 | Surface Mount | Surface Mount |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Device Family | — | MAX 5000 |
| Product Type | — | UV-Erasable PLD (CPLD) |
| Propagation Delay (tPD) | — | 45 ns |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| Dedicated Inputs | — | 19 |
| User I/O Lines | — | 48 |
| Total Inputs (I/O + dedicated) | — | 68 |
| Terminal Pitch | — | 0.650 mm |
| Speed Grade | — | -2 (45 ns) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Logic Elements | — | AND/OR array with programmable macrocell register |