EPM51929C vs EPM5192AGC-15 比較
詳細並排比較 EPM51929C 由 Intel 與 EPM5192AGC-15 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM51929C | EPM5192AGC-15 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Device Family | MAX 5000 | — |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Architecture | Multi-array matrix (PAL-based macrocells) | — |
| Logic Density | [DATA_NEEDED: usable gates] | — |
| Number of Macrocells | [DATA_NEEDED: macrocell count] | — |
| 腳位數 | [DATA_NEEDED: pin count] | — |
| Package Type | [DATA_NEEDED: package suffix - C denotes commercial temperature grade] | — |
| Technology | CMOS EPROM | CMOS, UV-erasable EPROM |
| Programmability | UV-erasable, JEDEC fuse map | — |
| 工作溫度 | Commercial (0C to +70C) | [DATA_NEEDED: operating temperature range] |
| 供應電壓 | [DATA_NEEDED: VCC range] | — |
| Propagation Delay | [DATA_NEEDED: tpd specification] | — |
| Maximum Toggle Frequency | [DATA_NEEDED: fmax] | — |
| 安裝類型 | Surface Mount or Through-Hole (package dependent) | — |
| RoHS 狀態 | unknown | [DATA_NEEDED: RoHS status - legacy ceramic PGA typically non-compliant] |
| Lead-Free | unknown | — |
| MSL 等級 | [DATA_NEEDED] | — |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Series | — | MAX 5000 |
| Macrocells | — | 192 |
| Logic Array Blocks | — | 16 (typical for 192-macrocell MAX 5000) |
| Maximum User I/O Pins | — | 64 |
| Dedicated Inputs | — | 7 |
| Total Inputs | — | 72 |
| Propagation Delay (tPD) | — | 15 ns (pin-to-pin, -15 speed grade) |
| Supply Voltage (VCC) | — | 5 V |
| 封裝 | — | Ceramic Pin Grid Array (PGA) |
| Programming Method | — | UV erase + EPROM program (via Altera programmer) |
| 生命週期狀態 | — | Obsolete / Last Time Buy (per Altera legacy product list) |