EPM570T144C3 vs EPM570T144C5N 比較
詳細並排比較 EPM570T144C3 由 Intel 與 EPM570T144C5N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM570T144C3 | EPM570T144C5N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Family | MAX II | MAX II |
| Device | EPM570 | — |
| Logic Elements (LEs) | 440 | 570 |
| Macro Cells | 440 | — |
| Maximum User I/O Pins | 160 | 116 |
| User Flash Memory | 4.0 Kbits | — |
| Logic Array Blocks (LABs) | 8 | — |
| Speed Grade | C3 (5.4 ns tPD1) | — |
| Process Technology | 0.18 µm | 0.18 µm 6-layer-metal flash |
| Core Voltage (VCCINT) | 3.3 V (internal regulator generates 2.5 V core) | 1.8 V (typical, internally regulated) |
| I/O Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt I/O) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (multi-voltage, per bank) |
| Maximum Frequency (internal) | 304 MHz | — |
| Propagation Delay (tPD1) | 5.4 ns | — |
| 封裝 | 144-pin TQFP (20 mm × 20 mm × 1.4 mm) | TQFP-144 (20 × 20 mm, 0.5 mm pitch) |
| Operating Temperature (Commercial) | 0 °C to +85 °C | — |
| Programming Interface | IEEE 1149.1 JTAG (ISP) | IEEE 1149.1 JTAG (in-system programmable) |
| Configuration | Non-volatile, instant-on (single-chip) | — |
| RoHS 狀態 | [DATA_NEEDED: rohs status] | Compliant |
| Series | — | MAX II Device |
| Macrocells | — | 440 |
| User I/Os | — | 116 |
| Internal User Flash Memory | — | 8 Kbit |
| Global Clocks | — | 4 |
| Propagation Delay (tPD) | — | 5.5 ns (typical, [DATA_NEEDED: exact speed grade]) |
| Maximum Frequency (fMAX) | — | 201.1 MHz |
| 工作溫度 | — | 0 °C to +85 °C (commercial, C5 grade) |
| 安裝類型 | — | Surface Mount |
| Configuration Storage | — | On-chip non-volatile flash |
| Supported I/O Standards | — | LVCMOS, LVTTL, PCI, LVDS, SSTL (per bank VCCIO) |
| Lead-Free | — | Yes |
| MSL 等級 | — | 3 (per JEDEC J-STD-020) |
| Design Software | — | Intel Quartus II (MAX II device support) |