EPM7128SQI100-15N vs EPM7128SQC100-15 比較
詳細並排比較 EPM7128SQI100-15N 由 Intel 與 EPM7128SQC100-15 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM7128SQI100-15N | EPM7128SQC100-15 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 最後購買 |
| 單價 (USD) | — | $8.20 |
| Family | MAX 7000S | MAX 7000 |
| Device Type | EE-PLD / CPLD | CPLD (Complex Programmable Logic Device) |
| Macrocells | 128 | 128 |
| User I/Os | 80 | 84 |
| Usable Gates | 2,500 (typical) | — |
| Propagation Delay (tPD) | 15 ns | — |
| Maximum Frequency (fCNT) | 76.9 MHz | — |
| Core Supply Voltage (VCCINT) | 4.5 V to 5.5 V | — |
| I/O Logic Levels | 3.3 V or 5 V (multi-volt I/O) | — |
| Operating Temperature Grade | Industrial (-40C to +85C) | — |
| 封裝 | PQFP-100 (R-PQFP-G100) | 100-pin PQFP (Plastic Quad Flat Pack) |
| Terminal Form | Gull Wing | — |
| Package Code | QFP | — |
| 安裝類型 | Surface Mount | Surface Mount |
| Process Technology | CMOS | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| Non-volatile Configuration | EEPROM (instant-on) | — |
| RoHS 狀態 | Lead-free (N suffix) | Non-compliant (SnPb lead finish - legacy PQFP) |
| Logic Array Blocks (LABs) | — | 4 (16 macrocells each) |
| Pin-to-Pin Delay (tPD) | — | 15 ns |
| Maximum Frequency (fMAX) | — | [DATA_NEEDED: fMAX value] |
| Typical Gate Count | — | 2,500 gates |
| Supply Voltage (VCCINT) | — | 5 V (5% tolerance) |
| Programming Technology | — | EEPROM (in-system programmable via JTAG) |
| JTAG Interface | — | IEEE Std. 1149.1 compliant |
| 工作溫度 | — | 0C to +70C (Commercial) |
| MSL 等級 | — | 3 (168 hours) |