EPM7160SLI84-10 vs EPM7160SLC84-15 比較

詳細並排比較 EPM7160SLI84-10 由 Intel 與 EPM7160SLC84-15 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Intel
EPM7160SLI84-10 EPM7160SLI84-10 - MAX 7000S CPLD, 160 Macrocells, 84-PLCC | Intel

EPM7160SLI84-10 - MAX 7000S CPLD, 160 Macrocells, 84-PLCC | Intel

EPM7160SLI84-10 ⚠ 最後購買機會

規格比較

參數 EPM7160SLI84-10 EPM7160SLC84-15
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 最後購買 Obsolete
Series MAX 7000S —
Family CPLD - Complex Programmable Logic Device MAX 7000
Usable Gates 3,200 3,200
Macrocells 160 160
Logic Elements 160 —
User I/O Pins 64 —
Propagation Delay (tpd) 10 ns —
Internal Counter Frequency 167 MHz —
Operating Frequency (max) 100 MHz —
供應電壓 5.0 V —
Technology CMOS, EEPROM-based CMOS, EEPROM configuration
封裝 84-pin PLCC (LCC-84) —
安裝類型 Surface Mount / Through-Hole (socket) Surface Mount (PLCC socket or direct solder)
工作溫度 0C to +70C (Commercial) 0 C to 70 C
Programmability In-System (JTAG IEEE 1149.1) + EEPROM —
MultiVolt I/O Yes (2.5V / 3.3V / 5V) —
I/O Standards LVTTL, LVCMOS, TTL, CMOS —
RoHS 狀態 [DATA_NEEDED: RoHS status] Not RoHS compliant (contains lead, SnPb finish typical)
Maximum Propagation Delay — 15 ns
Maximum User I/O Pins — 64
Supply Voltage (VCCINT/VCIO) — 4.75 V to 5.25 V (5 V nominal)
I/O Logic Level — Configurable 3.3 V or 5 V
Package Type — PLCC-84 (PQCC84, JEDEC S-PQCC-J84)
Terminal Pitch — 1.270 mm
Programming Interface — JTAG (IEEE 1149.1) in-system programmable
Lifecycle — Obsolete / last-time-buy (per Altera/Intel PDN)

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