EPM7192EGI160-20 vs EPM7192EQC160-20 比較
詳細並排比較 EPM7192EGI160-20 由 Intel 與 EPM7192EQC160-20 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Intel
EPM7192EQC160-20 - 192-Macrocell MAX 7000 CPLD, 20ns, PQFP-160 | Intel
EPM7192EQC160-20 Obsolete規格比較
| 參數 | EPM7192EGI160-20 | EPM7192EQC160-20 |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | Obsolete |
| Family | MAX 7000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 192 | — |
| Logic Array Blocks | 4 | — |
| User I/O Pins | 36 | — |
| Dedicated Inputs | 4 | — |
| Pin-to-Pin Delay (tpd) | 20 ns | — |
| Maximum Operating Frequency | 62.5 MHz | — |
| Supply Voltage (VCCINT) | 5.0 V | 4.75 V to 5.25 V |
| Program Memory Type | EEPROM | — |
| In-System Programmability | Yes (JTAG IEEE Std. 1149.1) | — |
| 封裝 | 160-pin CPGA (Ceramic Pin Grid Array) | — |
| Operating Temperature Grade | Industrial (-40C to +85C) | — |
| RoHS 狀態 | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS status - non-RoHS era part] |
| Programming Interface | JTAG (ByteBlaster / USB-Blaster compatible) | — |
| Series | — | MAX 7000 |
| Programmable Type | — | EE PLD (EEPROM-based) |
| Number of Macrocells | — | 192 |
| Number of Logic Array Blocks | — | 4 |
| Number of User I/O Pins | — | 124 (per package), 36 (per data source variant description) |
| Delay Time (tPD) | — | 20 ns |
| Internal Counter Frequency (fCNT) | — | 100 MHz typical |
| 工作溫度 | — | -40C to +85C (industrial) |
| 封裝 / 外殼 | — | 160-BQFP / 160-PQFP (28x28 mm) |
| 安裝類型 | — | Surface Mount |
| In-System Programmable (ISP) | — | Yes, 5.0 V ISP via JTAG (IEEE Std. 1149.1) |
| Programmable Security Bit | — | Yes |
| Power-Saving Mode | — | Yes, programmable per macrocell |
| MSL 等級 | — | [DATA_NEEDED: MSL rating] |