EPM7256AEQC208-5N vs EPM7256AEQI208-7N 比較
詳細並排比較 EPM7256AEQC208-5N 由 Altera 與 EPM7256AEQI208-7N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM7256AEQC208-5N | EPM7256AEQI208-7N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| Family | MAX 7000A | MAX 7000A |
| Logic Family / Base Technology | CMOS, EEPROM-based | — |
| Usable Gates | 5,000 | 5,000 |
| Macrocells | 256 | 256 |
| User I/Os | 164 | — |
| Dedicated Inputs | 16 | — |
| 腳位數 | 208 | — |
| 封裝 | 208-pin PQFP (Plastic Quad Flat Pack) | 208-pin PQFP (FQFP) |
| Supply Voltage (VCCINT) | 3.3 V | — |
| Maximum Internal Frequency | 172.4 MHz | 126.6 MHz |
| Pin-to-Pin Propagation Delay (tPD) | 5.5 ns | 7.5 ns |
| Speed Grade | -5 | -7 |
| 工作溫度 | 0 C to +70 C (Commercial) | — |
| Programming Interface | JTAG (IEEE Std. 1149.1) / ISP | — |
| 安裝類型 | Surface Mount | Surface Mount |
| RoHS 狀態 | unknown | Compliant (N suffix) |
| MSL 等級 | [DATA_NEEDED: MSL Level] | — |
| User I/O Pins | — | 164 |
| Logic Array Blocks | — | 16 |
| 供應電壓 | — | 3.3 V |
| Configuration Technology | — | EEPROM (non-volatile) |
| Number of Terminals | — | 208 |
| Terminal Form | — | Gull Wing |
| Package Shape | — | Square |
| Operating Temperature Grade | — | Industrial |
| Lead Finish | — | [DATA_NEEDED: lead finish] |