EPM7256AEQI208-7N vs EPM7256AEQC208-5N 比較
詳細並排比較 EPM7256AEQI208-7N 由 Altera 與 EPM7256AEQC208-5N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM7256AEQI208-7N | EPM7256AEQC208-5N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | Obsolete |
| Family | MAX 7000A | MAX 7000A |
| Macrocells | 256 | 256 |
| Usable Gates | 5,000 | 5,000 |
| User I/O Pins | 164 | — |
| Logic Array Blocks | 16 | — |
| Pin-to-Pin Propagation Delay (tPD) | 7.5 ns | 5.5 ns |
| Maximum Internal Frequency | 126.6 MHz | 172.4 MHz |
| 供應電壓 | 3.3 V | — |
| Configuration Technology | EEPROM (non-volatile) | — |
| 封裝 | 208-pin PQFP (FQFP) | 208-pin PQFP (Plastic Quad Flat Pack) |
| Number of Terminals | 208 | — |
| Terminal Form | Gull Wing | — |
| Package Shape | Square | — |
| 安裝類型 | Surface Mount | Surface Mount |
| Operating Temperature Grade | Industrial | — |
| Speed Grade | -7 | -5 |
| RoHS 狀態 | Compliant (N suffix) | unknown |
| Lead Finish | [DATA_NEEDED: lead finish] | — |
| Logic Family / Base Technology | — | CMOS, EEPROM-based |
| User I/Os | — | 164 |
| Dedicated Inputs | — | 16 |
| 腳位數 | — | 208 |
| Supply Voltage (VCCINT) | — | 3.3 V |
| 工作溫度 | — | 0 C to +70 C (Commercial) |
| Programming Interface | — | JTAG (IEEE Std. 1149.1) / ISP |
| MSL 等級 | — | [DATA_NEEDED: MSL Level] |