EPM9560RC208-9 vs EPM9560RC208-10 比較
詳細並排比較 EPM9560RC208-9 由 Altera 與 EPM9560RC208-10 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM9560RC208-9 | EPM9560RC208-10 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD / EPLD | CPLD (Complex Programmable Logic Device) |
| Macrocells | 560 | 560 |
| Usable Gates | 12,000 | 12,000 |
| Logic Array Blocks (LABs) | 16 | 16 |
| User I/O Pins | 212 | — |
| Pin-to-Pin Delay (tPD) | 9 ns | 10 ns |
| Maximum Operating Frequency | [DATA_NEEDED: fMAX from datasheet] | — |
| Core Voltage | 5 V | — |
| Supply Voltage Range | 4.75 V to 5.25 V | — |
| Programmability | In-system programmable (JTAG) | JTAG (IEEE 1149.1) in-system programming |
| 封裝 | 208-pin RQFP (Power Quad Flat Pack) | 208-pin RQFP (Plastic Quad Flat Pack) |
| Speed Grade | -9 | — |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | 0C to +70C (commercial) |
| 安裝類型 | Surface Mount | Surface Mount |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: not stated in retrieved distributor listings] |
| Process Technology | EPROM-based (one-time programmable) / UV-erasable | 0.30 µm CMOS EEPROM |
| Maximum User I/O Pins | — | 212 (208-pin package variant) |
| Maximum Frequency (fMAX) | — | [DATA_NEEDED: internal toggle frequency in MHz] |
| Supply Voltage (VCCINT) | — | 5.0 V |
| I/O Standards Supported | — | 5.0 V TTL, 3.3 V LVTTL, 2.5 V (multiVolt I/O) |
| Configuration Memory | — | EEPROM (in-system programmable via JTAG) |
| Lead-Free | — | [DATA_NEEDED: confirm lead-free status -10 suffix is conventional Pb-containing] |