RTAX2000SL-1CGS624EV vs RTAX2000SL-1CGS624V 比較
詳細並排比較 RTAX2000SL-1CGS624EV 由 Microchip Technology 與 RTAX2000SL-1CGS624V 由 Microsemi. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Microchip Technology
RTAX2000SL-1CGS624EV - 2M-Gate Rad-Tolerant FPGA | Microchip
RTAX2000SL-1CGS624EV ✓ 啟用中Microsemi
RTAX2000SL-1CGS624V - 2M-Gate Rad-Tolerant FPGA | Actel/Microchip
RTAX2000SL-1CGS624V ✓ 啟用中規格比較
| 參數 | RTAX2000SL-1CGS624EV | RTAX2000SL-1CGS624V |
|---|---|---|
| 品牌 | Microchip Technology | Microsemi |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Family | RTAX-S/SL Radiation-Tolerant FPGAs | — |
| Equivalent System Gates | 2,000,000 (family up to 4,000,000) | 2000000 |
| Logic Cells | 32,256 | — |
| CLBs | 21,504 | — |
| ASIC Gate Equivalent | 250,000 additional | — |
| Technology | CMOS anti-fuse, one-time programmable | Digital CMOS, antifuse nonvolatile |
| Speed Grade | -1 | -1 |
| 封裝 | 624-terminal ceramic CGA (CGS624) | 624-ball ceramic CGA (CGS624) |
| Terminals | 624 | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | Up to 540 kbits with optional EDAC |
| Configuration | Live at power-up (no external boot device) | One-time programmable (OTP), live at power-up, single chip |
| Radiation Tolerance | Radiation-tolerant (TID/SEE per datasheet qualification) | — |
| Applications | Space-flight systems | — |
| 安裝類型 | Surface Mount | Surface Mount |
| Heritage | RTAX2000SL recognized as heritage-equivalent to RTAX2000S (per Microchip and ESA/ESCC REP 010 industry practice) | — |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Core Voltage | [DATA_NEEDED: core supply voltage] | — |
| MSL 等級 | [DATA_NEEDED: moisture sensitivity level] | — |
| Logic Cells (CLBs) | — | 21504 |
| User I/Os (max, package dependent) | — | Up to 684 |
| Total Ionizing Dose (TID) | — | 300 krad (functional), 200 krad (parametric) |
| SEU Rate | — | Less than 1E-10 errors per bit-day |
| Quality / Screening Suffix | — | S (space flow), V suffix qualification level |
| Core Supply Voltage | — | [DATA_NEEDED: core supply voltage] |
| I/O Supply Voltage | — | [DATA_NEEDED: I/O supply voltage] |
| Embedded SRAM Features | — | Built-in FIFO control logic |
| Clocking | — | Segmentable clocks, chip-wide highway routing |