XC2C64A-7CP56C vs XC2C64A-5CP56C 比較

詳細並排比較 XC2C64A-7CP56C 由 AMD 與 XC2C64A-5CP56C 由 AMD. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。

AMD

XC2C64A-7CP56C - 64-Macrocells, 1.8V CPLD | AMD

XC2C64A-7CP56C Obsolete

AMD

XC2C64A-5CP56C ✓ 啟用中

參數	XC2C64A-7CP56C	XC2C64A-5CP56C
品牌	AMD	AMD
類別	FPGA & CPLD	FPGA & CPLD
生命週期狀態	Obsolete	啟用中
Device Type	CoolRunner-II complex programmable logic device	CoolRunner-II complex programmable logic device (CPLD)
Macrocell Count	64 macrocells	—
Equivalent Logic Capacity	1.5K gates	—
Internal Frequency	333 MHz	333 MHz
Propagation Delay	5 ns	—
Pin-to-Pin Logic Delay	4.6 ns	—
User I/O Count	45 I/Os	—
Logic Family	CMOS	CMOS
Process Technology	0.18 µm CMOS	0.18 micron CMOS
Core Supply Voltage	1.8 V	—
靜態電流	15 µA	15 A as reported in the verified search summary
Package Type	CSP-56, 6 x 6 mm, 0.50 mm pitch	56-ball CSP/LFBGA
腳位數	56 pins	—
安裝類型	Chip-scale surface-mount package	—
工作溫度	[DATA_NEEDED: operating temperature range]	—
RoHS Compliance	[DATA_NEEDED: RoHS status]	—
REACH Compliance	[DATA_NEEDED: REACH status]	—
AEC-Q100 Qualification	[DATA_NEEDED: AEC-Q100 status]	[DATA_NEEDED: AEC-Q100 qualification status]
Number of Macrocells	—	64
Logic Elements or Blocks	—	4
User I/O Pins	—	45
Total Terminals	—	56
Maximum Pin-to-Pin Propagation Delay	—	4.6 ns
Internal Supply Voltage Range	—	1.7 V to 1.9 V
System Optimization Voltage	—	1.8 V
Programmable Type	—	In-system programmable
Package Dimensions	—	6 x 6 mm
Ball Pitch	—	0.50 mm
Temperature Grade	—	Commercial
RoHS 狀態	—	[DATA_NEEDED: RoHS status]
REACH Status	—	[DATA_NEEDED: REACH status]
工作溫度範圍	—	[DATA_NEEDED: operating temperature range]