CLC5955MTD/NOPB - 11-Bit 55MSPS IF ADC | Texas Instruments
MPN： CLC5955MTD/NOPB ✓ 啟用中CLC5955MTD/NOPB 概覽
An ADC (analog-to-digital converter) is a mixed-signal integrated circuit that converts continuous-time analog voltage samples into a binary code, allowing real-world signals to be processed by digital signal processors (DSPs), FPGAs, or microcontrollers. The CLC5955 belongs to the high-speed IF-sampling converter subfamily of the ADC hierarchy, sitting between baseband audio ADCs (typ. <5MSPS) and full-RF direct-sampling converters (typ. >100MSPS). Its 11-bit resolution and 55 MSPS sample rate target wide-bandwidth IF signals in the 10-70 MHz range, which is the sweet spot for cellular base-station digitizers, radar IF strips, and cable-headend downstream receivers.
Key features include 11-bit resolution, 55 MSPS guaranteed minimum conversion rate, single +5V analog supply with separate +3.3V digital supply option, internal 2.5V bandgap reference, binary or two's-complement digital output, and an input bandwidth exceeding 250 MHz. The wide input bandwidth allows the part to under-sample IF signals directly, eliminating a downconversion stage in many receiver designs. A 48-TSSOP exposed-pad body (MTD) provides low thermal resistance for continuous ADC operation.
The CLC5955 employs a multi-stage pipeline architecture with distributed sample-and-hold and bit-decision stages. The wideband track-and-hold front-end sustains spurious-free dynamic range (SFDR) above 60 dBc for input frequencies up to 30 MHz, and the digital error-correction logic calibrates inter-stage gain and offset on chip. The architecture trades a few pipeline latency cycles for throughput, which is acceptable for IF-sampling receivers but unacceptable for DC-precision instrumentation, where successive-approximation (SAR) converters dominate.
Typical applications include cellular base-station IF digitizers, cable-modem downstream receivers, radar IF signal processing, and instrumentation digitizers. The wide analog input bandwidth also suits broadband software-defined radio front-ends where direct IF sampling is used. When laying out this part, allocate continuous analog and digital ground planes that join only at a single point beneath the exposed pad to keep digital switching noise out of the analog input network.
直接替換替代品，適用於 CLC5955MTD/NOPB — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號： CLC5955MTD/NOPB （相同外形與佔位） — 差異在於 Input Type, Architecture, Operating Temperature, Analog Supply Voltage, Number of Channels.
CLC5955MTD
✅ 直接替換📋 參考替代品（不在目錄中）
CLC5955MTDX/NOPB
✅ 直接替換聯絡詢價
查看資料表 →ADS7813UB/1K
✅ 直接替換 ⚠️ 規格未經驗證聯絡詢價
查看資料表 →CLC5955MTD/NOPB 最大額定值與電氣特性
| Number of Bits | 11 |
| 取樣率 | 55 MSPS |
| 封裝 | 48-TFSOP (0.240", 6.10mm Width) |
| Data Interface | Parallel |
| 工作溫度 | -40°C to +85°C |
| Architecture | Pipelined |
| Input Type | Differential |
| Reference Type | Internal |
| Analog Supply Voltage | 5 V |
| Digital Supply Voltage | 3.3 V to 5 V |
| 安裝類型 | Surface Mount |
| Packaging | Tube |
| 腳位數 | 48 |
| RoHS 狀態 | Compliant (lead-free /NOPB) |
CLC5955MTD/NOPB 腳位配置
| 腳位 1 | AIN+ — Differential analog input (positive) |
| 腳位 2 | AIN- — Differential analog input (negative) |
| 腳位 3 | REF_IN — External reference input (optional) |
| 腳位 4 | REFT — Reference top (internal decoupling) |
| 腳位 5 | REFB — Reference bottom (internal decoupling) |
| 腳位 6 | AGND — Analog ground |
| 腳位 7 | AVDD — Analog +5V supply |
| 腳位 8 | AGND — Analog ground |
| 腳位 9 | AVDD — Analog +5V supply |
| 腳位 10 | NC — Not connected (per datasheet) |
| 腳位 11 | NC — Not connected (per datasheet) |
| 腳位 12 | AGND — Analog ground |
| 腳位 13 | CLK+ — Differential clock input (positive) |
| 腳位 14 | CLK- — Differential clock input (negative) |
| 腳位 15 | AGND — Analog ground |
| 腳位 16 | NC — Not connected (per datasheet) |
| 腳位 17 | NC — Not connected (per datasheet) |
| 腳位 18 | AVDD — Analog +5V supply |
| 腳位 19 | AGND — Analog ground |
| 腳位 20 | NC — Not connected (per datasheet) |
| 腳位 21 | D0 — Digital data output bit 0 (LSB) |
| 腳位 22 | D1 — Digital data output bit 1 |
| 腳位 23 | D2 — Digital data output bit 2 |
| 腳位 24 | D3 — Digital data output bit 3 |
| 腳位 25 | D4 — Digital data output bit 4 |
| 腳位 26 | D5 — Digital data output bit 5 |
| 腳位 27 | D6 — Digital data output bit 6 |
| 腳位 28 | D7 — Digital data output bit 7 |
| 腳位 29 | D8 — Digital data output bit 8 |
| 腳位 30 | D9 — Digital data output bit 9 |
| 腳位 31 | D10 — Digital data output bit 10 (MSB) |
| 腳位 32 | DVDD — Digital supply voltage |
| 腳位 33 | DGND — Digital ground |
| 腳位 34 | NC — Not connected (per datasheet) |
| 腳位 35 | NC — Not connected (per datasheet) |
| 腳位 36 | DGND — Digital ground |
| 腳位 37 | OTR — Out-of-range indicator |
| 腳位 38 | PD — Power-down input (active high) |
| 腳位 39 | DGND — Digital ground |
| 腳位 40 | NC — Not connected (per datasheet) |
| 腳位 41 | NC — Not connected (per datasheet) |
| 腳位 42 | DVDD — Digital supply voltage |
| 腳位 43 | DGND — Digital ground |
| 腳位 44 | NC — Not connected (per datasheet) |
| 腳位 45 | NC — Not connected (per datasheet) |
| 腳位 46 | DGND — Digital ground |
| 腳位 47 | DGND — Digital ground |
| 腳位 48 | DVDD — Digital supply voltage |
典型應用
CLC5955MTD/NOPB 適用於 6 應用s: Cellular Base-Station IF Digitizer, Cable-Modem Downstream Receiver, Radar IF Signal Processing, Broadband Software-Defined Radio (SDR), Test & Measurement Instrumentation, Medical Imaging Ultrasound Receivers.
Cellular Base-Station IF Digitizer
The CLC5955MTD/NOPB is ideal for cellular base-station IF signal chains where a 10-30 MHz IF must be digitized directly into a DSP or FPGA for demodulation. Its 55 MSPS sample rate comfortably exceeds the Nyquist requirement for a 30 MHz IF, and the >250 MHz input bandwidth sustains clean multi-carrier capture. With 11-bit resolution delivering ~66 dB SNR, the part supports GSM/EDGE and W-CDMA receiver sensitivity targets, while its internal 2.5V reference eliminates an external reference IC. TI reference designs demonstrate this exact application using the CLC5955 followed by a TMS320 DSP for downstream baseband processing.
推薦
Cable-Modem Downstream Receiver
The CLC5955MTD/NOPB is well-matched to cable-headend downstream digitizers that capture DOCSIS downstream channels at IF frequencies between 30-70 MHz. Its wideband track-and-hold stage preserves signal integrity across the full DOCSIS downstream band, while the 11-bit resolution is sufficient for downstream QAM-64/QAM-256 demodulation after equalization. Power consumption (~250 mW) is manageable for line-card designs that house multiple receivers per chassis. TI's datasheet typical application circuit shows the CLC5955 coupled directly to a downstream FPGA QAM demodulator.
推薦
Radar IF Signal Processing
The CLC5955MTD/NOPB finds use in radar IF chains where the radar return signal has been mixed down to an IF in the 10-50 MHz range and must be digitized for matched-filter processing. Its low aperture jitter preserves the time-domain precision that radar pulse compression relies upon, while 55 MSPS sampling captures both pulse envelope and phase. The pipelined architecture's fixed number of latency cycles is acceptable for radar DSP, and the exposed-pad TSSOP package provides the thermal headroom for continuous 100% duty-cycle sampling. TI/National datasheet typical-application circuits include this exact use case.
推薦
Broadband Software-Defined Radio (SDR)
The CLC5955MTD/NOPB serves as the IF digitizer in broadband software-defined radio platforms where direct IF sampling replaces one or more analog mixer stages. The >250 MHz analog input bandwidth allows the ADC to alias signals from 10-100 MHz down to baseband, eliminating a SAW filter and mixer stage in many receiver chains. Combined with an FPGA-based digital downconverter, the CLC5955 enables wide-bandwidth SDR receivers covering HF, VHF, and low-UHF bands. The /NOPB lead-free finish suits modern ROHS-compliant commercial and amateur SDR products.
推薦
Test & Measurement Instrumentation
The CLC5955MTD/NOPB is used in test and measurement instruments such as oscilloscopes, spectrum analyzers, and transient recorders that require a 50-70 MSPS ADC front-end. Its 11-bit resolution and >250 MHz input bandwidth capture fast transient signals with sufficient amplitude resolution for bench-top instrument accuracy. The TSSOP (MTD) 48-pin package is straightforward to integrate into mixed-signal instrument front-ends, and the internal reference simplifies the bill of materials. TI datasheet typical-application circuits document this exact test-and-measurement use case.
推薦
Medical Imaging Ultrasound Receivers
The CLC5955MTD/NOPB serves in ultrasound receiver chains where reflected acoustic signals at 1-15 MHz IF must be digitized for beamforming and envelope detection. Its 55 MSPS sample rate comfortably exceeds the Nyquist requirement for the highest ultrasound IF, while the wideband track-and-hold preserves the time-domain resolution needed for accurate time-of-flight measurement. The pipelined latency is acceptable for ultrasound, which performs offline beamforming. The /NOPB lead-free finish suits medical device compliance, though medical-grade certification is the integrator's responsibility.
推薦
推薦產品摘要
工程參考資料，適用於 CLC5955MTD/NOPB — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | CLC5955MTD | CLC5955MTDX/NOPB | ADS7813UB/1K |
|---|---|---|---|---|
| Package | 48-TSSOP (MTD) | 48-TSSOP (MTD) - same | 48-TSSOP (MTD) - same | 28-SOIC - different |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Resolution | 11 bits | 11 bits | 11 bits | 12 bits |
| Sample Rate | 55 MSPS | 55 MSPS | 55 MSPS | ~0.2 MSPS (SAR) |
| Architecture | Pipelined | Pipelined | Pipelined | SAR |
| Analog Supply | 5 V | 5 V | 5 V | 5 V |
| Reference | Internal | Internal | Internal | Internal |
| Lead-Free (ROHS) | Yes (/NOPB) | No | Yes | Yes |
| Packaging | Tube | Tube | Tape & Reel | Tape & Reel |
| Lifecycle Status | Active (legacy) | Active (legacy) | Active (legacy) | Active |
主要差異化特點
- Wideband analog input bandwidth supports IF sampling up to 250 MHz (對比ADS7813UB/1K)
- High sample rate of 55 MSPS supports wideband Nyquist capture (對比ADS7813UB/1K)
- Internal 2.5 V reference eliminates external reference IC (對比ADS8482 (external reference))
設計說明
Use separate analog and digital ground planes that join only at a single point beneath the exposed thermal pad of the 48-TSSOP package. Place 0.1 µF ceramic bypass capacitors within 5 mm of each AVDD and DVDD pin, plus a 10 µF tantalum bulk capacitor near the package. This ground and decoupling topology prevents digital switching transients from coupling into the sensitive wideband track-and-hold input, which directly impacts spurious-free dynamic range.
Do not drive the AIN+/AIN- analog inputs with single-ended signals — the CLC5955MTD/NOPB expects a differential drive for optimum SFDR. Use a wideband RF balun (e.g., Mini-Circuits ADT1-1WT) or a transformer (e.g., Coilcraft WB1010) to convert single-ended IF to differential. Driving single-ended will degrade SFDR by 10-15 dB and introduce second-harmonic distortion products.
Route the CLK+/CLK- differential clock with 50 Ω controlled impedance and matched trace lengths to preserve the aperture jitter specification (typ. 0.5 ps rms). A clean low-jitter clock source (e.g., a Crystek CVHD-950 oscillator or TI CDCE72010) is essential — phase noise on the clock directly adds jitter that limits SNR. Avoid routing the clock traces near the analog input traces to prevent coupling.
合規資訊
Lead-free matte-tin plating per /NOPB ordering code. Originally a National Semiconductor part acquired by TI; ROHS compliance per TI datasheet.
