CS5532-ASZR - 24-bit Sigma-Delta ADC, PGIA | Cirrus Logic
MPN： CS5532-ASZR ✓ 啟用中CS5532-ASZR 概覽
A delta-sigma ADC is a type of analog-to-digital converter that uses oversampling and charge-balance (sigma-delta) modulation followed by digital decimation filtering to achieve very high resolution. Within the data converter hierarchy, it sits under ADC -> data converter -> mixed-signal IC, and it is the preferred architecture wherever sub-microvolt signals must be digitized, such as load-cell and bridge-sensor measurement.
Key features include 24-bit resolution achieved through charge-balance techniques, an integrated PGIA that eliminates a discrete instrumentation amplifier stage, two differential input channels with a user-selectable multiplexer, and ultra-low-noise performance optimized for low-level unipolar or bipolar signals. The A-grade device operates over the -40C to +85C industrial temperature range.
Architecturally, the CS5532 family employs a charge-balanced sigma-delta modulator with on-chip digital filtering and system calibration options (self and system calibration), which removes offset and gain errors from the signal path. The PGIA gain options let a single device span bridge outputs from millivolts to volts without external amplification, preserving noise performance that a discrete front-end would degrade.
Typical applications include weigh scales and load-cell front ends, process-control transmitters, scientific instrumentation, and medical measurement equipment - domains explicitly named by Cirrus Logic for this family, where the low-noise PGIA and calibration features directly improve system accuracy.
Design-wise, budget conversion time against the 3.84 kSPS maximum output rate: at high resolution settings the effective sample rate is far lower, so this part suits precision static measurements, not fast dynamic signals. A clean, low-noise reference is essential because resolution claims assume a quiet analog environment.
This page synthesizes distributor pricing, drop-in family alternatives, and practical design guidance not consolidated in the manufacturer datasheet.
直接替換替代品，適用於 CS5532-ASZR — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號： CS5532-ASZR （相同外形與佔位） — 差異在於 Number of Input Channels, Package, Interface, Calibration, Analog Supply Voltage.
CS5532-BSZ
✅ 直接替換聯絡詢價
查看資料表 →CS5532-BSZR
✅ 直接替換聯絡詢價
查看資料表 →CS5533-ASZR
✅ 直接替換聯絡詢價
查看資料表 →CS5534-ASZR
✅ 直接替換聯絡詢價
查看資料表 →CS5534-BSZ
✅ 直接替換聯絡詢價
查看資料表 →CS5530-ISZ
✅ 直接替換📋 參考替代品（不在目錄中）
CS5531-ASZ
✅ 直接替換聯絡詢價
查看資料表 →CS5532-ASZR 最大額定值與電氣特性
| 解析度 | 24 bit |
| Number of Input Channels | 2 differential inputs |
| Converter Type | Sigma-Delta (charge-balance) |
| Maximum Output Rate | 3.84 kSPS |
| Amplifier | Integrated ultra-low-noise PGIA |
| Input Type | Differential (unipolar or bipolar) |
| 介面 | Serial (SPI-compatible) |
| 封裝 | 20-pin SSOP |
| 工作溫度 | -40C to +85C |
| 安裝類型 | Surface Mount |
| Packaging | Tape & Reel (R suffix) |
| Typical Applications | Weigh scale, process control, scientific, medical |
CS5532-ASZR 20-pin ssop 腳位配置指南
CS5532-ASZR（20-pin ssop 封裝）的腳位配置。 此類比元件具有輸入、輸出與電源腳位。偏移歸零、補償與致能腳位配置請參閱製造商資料表。適用於訊號調理與放大器電路。
無詳細腳位定義資料： CS5532-ASZR.
請參閱 資料表 以查看完整腳位配置。
典型應用
CS5532-ASZR 適用於 6 應用s: Weigh Scale / Load-Cell Measurement, Industrial Process Control Transmitters, Scientific and Laboratory Instrumentation, Medical Measurement Equipment, Precision Data Acquisition Systems, Battery-Powered Portable Instruments.
Weigh Scale / Load-Cell Measurement
The CS5532-ASZR is explicitly optimized by Cirrus Logic for weigh scale applications, where load-cell bridges output only a few millivolts per volt of excitation. Its integrated ultra-low-noise PGIA accepts these microvolt-level differential signals directly, and 24-bit charge-balance conversion resolves the tiny increments required for high-division-count commercial scales. Placed between the load cell and the MCU serial bus, the ADC performs self and system calibration to cancel offset and gain drift, maintaining accuracy over temperature. Because the PGIA replaces a discrete instrumentation amplifier, total front-end noise is lower and board area is reduced - the key reason this family dominates precision weighing platforms.
推薦
Industrial Process Control Transmitters
In process control, low-level signals from thermocouples, RTD bridges, and pressure sensors must be digitized with high accuracy near motors and switching supplies. The CS5532-ASZR's 24-bit charge-balance sigma-delta modulator and ultra-low-noise PGIA provide the resolution headroom for 4-20 mA transmitter designs, while its two differential channels let one device sample both a sensor and a reference or diagnostic channel. The -40C to +85C A-grade temperature range covers field-mounted transmitter enclosures. Digital filtering attenuates mains-frequency interference (50/60 Hz), improving signal integrity in electrically noisy industrial environments without additional analog filtering stages.
推薦
Scientific and Laboratory Instrumentation
Scientific instruments - electrometers, photometers, and analytical sensors - require digitization of slow, extremely small differential signals where quantization and amplifier noise set the detection floor. The CS5532-ASZR's charge-balance techniques achieve 24-bit performance specifically for these low-level unipolar or bipolar signals. The serial (SPI-compatible) interface connects cleanly to microcontroller-based data-acquisition boards, and calibration routines performed at startup remove system offset and gain error before each measurement campaign. Running the converter at low word rates maximizes noise-free resolution, so instruments prioritize precision over the 3.84 kSPS maximum rate, which is ample for quasi-static phenomena.
推薦
Medical Measurement Equipment
Medical instrumentation named by Cirrus Logic for the CS5532/34 family includes diagnostic measurement devices where sensor outputs are millivolt-level and signal fidelity is safety- and accuracy-critical. The ultra-low-noise PGIA amplifies weak transducer signals without adding the noise of a discrete front-end, and the sigma-delta architecture's oversampling naturally suppresses out-of-band interference from nearby equipment. The two differential input channels support ratiometric measurements against a common reference, canceling excitation drift. Designers should still apply the appropriate medical-system isolation strategy external to the ADC, since the CS5532-ASZR itself is not a patient-isolation barrier.
推薦
Precision Data Acquisition Systems
General-purpose DAQ front ends benefit from the CS5532-ASZR's combination of 24-bit resolution, two multiplexed differential channels, and an SPI-compatible serial interface that integrates directly with standard MCUs. A single device digitizes two bridge or differential sensor inputs with per-channel gain settings from the PGIA, replacing an amplifier-plus-ADC cascade and simplifying calibration firmware. The 3.84 kSPS maximum output rate suits thermal, pressure, and weight monitoring, while the charge-balance modulator delivers stable, drift-tolerant readings over the -40C to +85C range required in distributed industrial DAQ nodes and remote telemetry equipment.
推薦
Battery-Powered Portable Instruments
Portable measurement instruments such as handheld scales, battery testers, and environmental meters benefit from the CS5532-ASZR's low-level signal capability within a compact 20-pin SSOP footprint. The sigma-delta architecture converts at low average power for slow-sampling applications, and the integrated PGIA removes the quiescent current of an external instrumentation amplifier, extending battery life relative to discrete front ends. The serial interface uses few MCU pins, and one-shot conversion control lets the system wake, sample, calibrate, and return to sleep. Designers should consult the datasheet supply-current figures to model battery budgets accurately for their selected word rate.
推薦
推薦產品摘要
工程參考資料，適用於 CS5532-ASZR — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | CS5532-BSZR | CS5534-ASZR | CS5530-ISZ | CS5531-ASZ |
|---|---|---|---|---|---|
| Package | 20-pin SSOP | 20-pin SSOP - same | 20-pin SSOP - same | 20-pin SSOP - same | 20-pin SSOP - same |
| Brand | Cirrus Logic | Cirrus Logic | Cirrus Logic | Cirrus Logic | Cirrus Logic |
| Resolution | 24 bit | 24 bit | 24 bit | 24 bit | 16 bit |
| Input Channels | 2 differential | 2 differential | 4 differential | 2 differential | 2 differential |
| Integrated PGIA | Yes (ultra-low-noise) | Yes | Yes | No | Yes |
| Packaging | Tape & Reel | Tape & Reel | Tape & Reel | Tube (66 units) | Tube |
主要差異化特點
- Integrated ultra-low-noise PGIA (對比CS5530-ISZ)
- Full 24-bit resolution at same footprint (對比CS5533-ASZR)
- Two-channel multiplexed differential inputs (對比CS5534-ASZR)
設計說明
The CS5532-ASZR's 24-bit resolution is only realized with a quiet analog front end. Route the differential input traces as tightly coupled pairs, place a small RC differential filter (e.g., 100 ohm / 0.1 uF, verify against the datasheet input impedance) at AIN1/AIN2, and keep switching regulators away from the analog ground region. Use a low-noise reference because reference noise appears directly in the output code; the PGIA gain multiplies both signal and input-referred noise, so higher gains require proportionally cleaner sources.
Do not assume 3.84 kSPS is the usable rate at full resolution: the converter's word-rate setting trades speed for noise-free bits, and precision weigh-scale designs typically run far below the maximum rate. Also budget time for self/system calibration after power-up and after gain changes - skipping calibration leaves offset and gain errors in the result. Verify grade suffix (A vs B) limits before substituting CS5532-BSZR in a qualified design.
Use a solid analog ground plane under the CS5532-ASZR and star-connect analog and digital grounds at a single point. Place 100 nF ceramic decoupling capacitors within 2-3 mm of each supply pin, with bulk capacitance nearby. Keep the crystal (for the conversion clock) leads short and guard it from digital serial lines. Reference the manufacturer datasheet's typical application circuit before finalizing layout; it reflects Cirrus Logic's validated decoupling and grounding scheme.
合規資訊
Compliance status not stated in the provided web data; verify against the Cirrus Logic product page or distributor compliance documents before design-in.
