CS5534-ASZR - 24-Bit 4-Ch Delta-Sigma ADC | Cirrus Logic
MPN： CS5534-ASZR ✓ 啟用中CS5534-ASZR 概覽
A delta-sigma ADC is a type of analog-to-digital converter that uses oversampling and noise-shaping (charge-balance techniques) to trade speed for extremely high resolution. Within the signal-chain hierarchy - analog front end, ADC, digital processing - the CS5534 sits at the direct sensor interface, converting low-level differential signals into digital words without requiring extensive external amplification.
Key features include 24-bit resolution, four differential input channels with an on-chip PGIA, an ultra-low-noise analog front end optimized for microvolt-level signals, and a serial SPI-compatible interface. According to the manufacturer product family page, the CS5531/32/33/34 converters use charge-balance techniques to achieve 16-bit (CS5531/33) and 24-bit (CS5532/34) performance and are optimized for measuring low-level unipolar or bipolar signals.
Architecturally, the device combines the instrumentation amplifier, a multi-channel input mux, and a fourth-order delta-sigma modulator followed by on-chip digital filtering. This integration eliminates the discrete amplifier stage that a conventional high-resolution ADC would need, reducing offset drift and noise contributions at the front end.
Typical applications include weigh scales and load-cell measurement, industrial process control, scientific instrumentation, and medical equipment - the exact domains cited by Cirrus Logic for this family, where microvolt-level signals must be digitized cleanly.
Design consideration: allocate adequate PCB area for analog/digital ground partitioning and use a low-noise reference, since the effective noise floor of the front end dominates system accuracy. The output data rate of 3.84 kSPS suits static and quasi-static measurements, not high-speed acquisition.
This page synthesizes distributor pricing, same-family drop-in alternatives, and practical design notes not found in the manufacturer datasheet.
直接替換替代品，適用於 CS5534-ASZR — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號： CS5534-ASZR （相同外形與佔位） — 差異在於 Number of Input Channels, Package, Interface, Input Type, Calibration.
CS5534-BSZR
✅ 直接替換聯絡詢價
查看資料表 →CS5532-ASZR
✅ 直接替換聯絡詢價
查看資料表 →CS5533-ASZ
✅ 直接替換聯絡詢價
查看資料表 →CS5531-ASZ
✅ 直接替換聯絡詢價
查看資料表 →CS5534-ASZR 最大額定值與電氣特性
| 解析度 | 24 bit |
| Number of Input Channels | 4 (differential) |
| Converter Type | Sigma-Delta (charge-balance) |
| Output Word Rate | 3.84 kSPS |
| Analog Front End | Ultra-low-noise PGIA (programmable gain instrumentation amplifier) |
| Input Type | Differential |
| 介面 | SPI (serial) |
| Analog Supply Voltage | 5 V |
| 封裝 | 24-SSOP |
| 安裝類型 | Surface Mount |
| 腳位數 | 24 |
| Packaging | Tape & Reel (R suffix) |
| Product Family | CS5531/CS5532/CS5533/CS5534 |
| Typical Applications | Weigh scale, process control, scientific and medical instrumentation |
CS5534-ASZR 24-ssop 腳位配置指南
CS5534-ASZR（24-ssop 封裝）的腳位配置。 此類比元件具有輸入、輸出與電源腳位。偏移歸零、補償與致能腳位配置請參閱製造商資料表。適用於訊號調理與放大器電路。
無詳細腳位定義資料： CS5534-ASZR.
請參閱 資料表 以查看完整腳位配置。
典型應用
CS5534-ASZR 適用於 6 應用s: Weigh Scales and Load-Cell Measurement, Industrial Process Control, Scientific Instrumentation, Medical Diagnostic Equipment, Temperature Measurement with RTDs and Thermocouples, Battery-Powered Portable Data Acquisition.
Weigh Scales and Load-Cell Measurement
Weigh scales are a primary target application for the CS5534-ASZR. According to Cirrus Logic, the CS5531/32/33/34 family is optimized for measuring low-level unipolar or bipolar signals in weigh scale applications. Load-cell bridge outputs are typically in the range of a few millivolts full-scale at microvolt-per-count levels; the on-chip ultra-low-noise PGIA amplifies these signals directly without an external instrumentation amplifier, eliminating a discrete stage's offset drift and noise. The 24-bit resolution yields the counting resolution required for retail and platform scales, while the 3.84 kSPS word rate supports checkweigher update rates. Multiple differential input channels allow multi-load-cell designs to share one converter with an integrated mux.
推薦
Industrial Process Control
The CS5534-ASZR digitizes low-level process signals such as pressure-transducer bridge outputs, thermocouple signals via cold-junction-compensated front ends, and 4-20 mA loop shunt voltages. Cirrus Logic explicitly lists process control among the family's target applications. The programmable gain instrumentation amplifier lets one hardware design cover multiple sensor sensitivities by changing gain registers over SPI instead of changing analog gain stages, simplifying product variants. The 24-bit resolution resolves fine pressure or temperature steps for control-loop quality, and the differential input architecture rejects common-mode noise typical of industrial cable runs. The 3.84 kSPS rate exceeds the bandwidth needs of most thermal and pressure control loops.
推薦
Scientific Instrumentation
Scientific instruments measuring low-level signals - photodiode outputs, ionization-chamber currents via transimpedance stages, and bridge-based laboratory sensors - benefit from the CS5534-ASZR's ultra-low-noise analog front end. The charge-balance delta-sigma architecture achieves 24-bit performance that resolves microvolt-level signals, and the integrated PGIA reduces component count in instruments where channel density matters. The four differential channels allow simultaneous-ish multiplexed acquisition of reference and measurement signals for ratiometric cancellation of excitation drift, a common technique in laboratory bridge measurements. The SPI interface connects cleanly to any microcontroller or FPGA sequencer used for instrument timing and data logging.
推薦
Medical Diagnostic Equipment
Medical instrumentation - patient scales, diagnostic analyzers, and biosignal acquisition front ends - is an application domain Cirrus Logic explicitly targets with the CS5531/32/33/34 family. The ultra-low-noise PGIA preserves weak physiological and bioanalytical signals, and the differential topology rejects common-mode interference from surrounding hospital equipment. In analyzer optics and flow-cytometry detectors, the 24-bit resolution captures wide dynamic-range photometric signals without gain ranging, and the 3.84 kSPS rate is ample for chemical assay kinetics. Four multiplexed channels let one converter serve multiple detector or electrode channels, reducing per-channel cost in multi-parameter benchtop and point-of-care diagnostic platforms.
推薦
Temperature Measurement with RTDs and Thermocouples
The CS5534-ASZR suits precision temperature measurement using RTD bridges and thermocouples. RTD bridges produce low-level differential outputs where excitation-current drift can be cancelled ratiometrically by measuring the reference channel through a second CS5534 input - the integrated 4-channel mux makes this technique practical in one converter. Thermocouple microvolt-level Seebeck signals are amplified by the PGIA's low-noise gain stages without adding measurable thermal noise. The 24-bit resolution distinguishes sub-degree temperature steps needed for process calibration and laboratory-grade measurement, while the 3.84 kSPS output word rate comfortably exceeds the thermal time constants of RTD and thermocouple probes.
推薦
Battery-Powered Portable Data Acquisition
The CS5534-ASZR integrates the instrumentation amplifier, mux, and delta-sigma modulator in one 24-SSOP device, which reduces board area and component count for portable and battery-powered data-acquisition nodes. Fewer discrete analog stages mean fewer sources of offset drift that would otherwise require periodic field calibration, an important operational benefit for deployed loggers. The SPI serial interface connects to low-power microcontrollers, and the moderate 3.84 kSPS rate permits duty-cycled acquisition where the converter runs only during sampling windows to conserve energy. Differential inputs reject ground-bounce noise in single-supply portable systems, preserving the low-noise performance across the full measurement path.
推薦
推薦產品摘要
工程參考資料，適用於 CS5534-ASZR — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | CS5534-BSZR | CS5532-ASZR | CS5533-ASZ | CS5531-ASZ |
|---|---|---|---|---|---|
| Package | 24-SSOP | 24-SSOP - same | 24-SSOP - same | 24-SSOP - same | 24-SSOP - same |
| Brand | Cirrus Logic | Cirrus Logic | Cirrus Logic | Cirrus Logic | Cirrus Logic |
| Resolution | 24 bit | 24 bit | 24 bit | 16 bit | 16 bit |
| Input Channels | 4 differential | 4 differential | 2 differential | 4 differential | 2 differential |
| PGA Front End | Ultra-low-noise PGIA | Ultra-low-noise PGIA | Ultra-low-noise PGIA | Ultra-low-noise PGIA | Ultra-low-noise PGIA |
| Interface | SPI (serial) | SPI (serial) | SPI (serial) | SPI (serial) | SPI (serial) |
| Packaging Format | Tape & Reel (R) | Tape & Reel (R) | Tape & Reel (R) | Tray/Tube (Z) | Tray/Tube (Z) |
| Performance Grade | A grade | B grade | A grade | A grade (16-bit tier) | A grade (16-bit tier) |
主要差異化特點
- Full 4-channel capability at 24-bit resolution (對比CS5532-ASZR)
- Highest resolution in the same footprint (對比CS5533-ASZ)
- Ultra-low-noise integrated PGIA (對比AD7124-8)
設計說明
Partition the PCB into analog and digital ground regions joined at a single star point under the converter. The CS5534's ultra-low-noise PGIA means the front end resolves microvolt-level signals, so ground-plane noise from SPI return currents can dominate the noise budget if allowed to cross analog regions. Keep the voltage reference traces short and guarded, and place the 5 V analog supply decoupling (typically 0.1 uF ceramic plus bulk capacitance) directly at the VA+ pin. Follow the layout guidance in the manufacturer datasheet's typical application section for the weigh-scale reference design.
The SPI interface should use series termination (22-33 ohm) on SCLK and SDIO lines if trace lengths exceed a few centimeters, since ringing on clock edges can cause marginal setup/hold timing at the converter. Route the SPI bus away from the analog input traces; a switching digital line capacitively coupled into a PGIA input appears as input-referred noise that the 24-bit resolution will faithfully digitize. For multiplexed channels, allow digital-filter settling time after each channel switch before accepting conversion data.
Do not treat the CS5534 as a general-purpose high-speed ADC: at a 3.84 kSPS maximum word rate it targets static and quasi-static measurements, and forcing high channel-scan rates leaves insufficient filter settling per conversion, degrading effective resolution. Also note the CS5534 has no cross-brand pin-to-pin replacement - designs requiring second sources should plan a socket-compatible footprint strategy early. When substituting the 16-bit CS5533 for cost reduction, revalidate the system accuracy budget, since 16 bits yield roughly 65,536 counts versus the CS5534's 16.7 million.
Supply the analog section from a clean low-noise 5 V rail; a switching regulator's ripple feeding VA+ appears at the ADC output as spurs unless heavily post-filtered. Estimated: a linear post-regulator with even 40 dB of ripple rejection at the switching frequency reduces a 50 mV ripple to 0.5 mV, preserving the converter's noise floor. Sequence the analog and digital supplies per the manufacturer datasheet's power-supply recommendations and verify the digital interface level compatibility (VDD domain) against the host controller before layout.
合規資訊
RoHS, REACH, lead-free and halogen status not stated in the verified web data retrieved for this part; confirm via Cirrus Logic product page or request material declarations through XAIPART before compliance-critical orders.
