CS5534-BSZR - 24-Bit Delta-Sigma ADC with PGIA | Cirrus Logic Inc.
MPN： CS5534-BSZR ✓ 啟用中CS5534-BSZR 概覽
A delta-sigma ADC is a type of analog-to-digital converter that uses oversampling and charge-balance (sigma-delta) modulation to achieve very high resolution, typically 16 to 24 bits, at moderate conversion speeds. Within the data-acquisition hierarchy, it sits above general-purpose SAR ADCs in resolution and below high-speed pipeline converters in throughput, making the delta-sigma architecture the dominant choice for precision sensor measurement front ends in weigh scales, process control, scientific instrumentation, and medical equipment.
Key features of the CS5534-BSZR include 24-bit resolution achieved through charge-balance techniques, four differential input channels for multi-sensor systems, an integrated PGIA that eliminates a discrete instrumentation amplifier stage, and ultra-low-noise performance optimized for measuring low-level unipolar or bipolar signals. The on-chip PGIA supports gain selection so microvolt-level bridge and thermocouple signals can be amplified before conversion, directly improving effective system resolution.
Technically, the device belongs to the CS5531/32/33/34 family, which pairs a low-noise PGIA front end with a fourth-order (per family architecture) delta-sigma modulator and on-chip digital filtering. The serial interface allows configuration of gain, line-frequency rejection, and conversion rates, while calibration options support system-level offset and gain correction without external trimming components.
Typical applications include weigh-scale load-cell front ends, where microvolt-level bridge outputs demand ultra-low input noise; process-control transmitters measuring 4-20 mA loop sensor signals; and medical or scientific instruments digitizing low-level bipolar signals with high linearity.
A key design consideration: the analog front end requires careful layout - separate clean analog supplies, a stable voltage reference, and guarding around input traces - because at 24-bit resolution, board-level noise can dominate the ADC's own performance.
This page synthesizes distributor pricing, drop-in family alternatives, datasheet guidance, and practical design notes not consolidated in the manufacturer datasheet, with pricing as of 2026-09-13.
直接替換替代品，適用於 CS5534-BSZR — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號： CS5534-BSZR （相同外形與佔位） — 差異在於 Number of Input Channels, Package, Calibration, Interface, Architecture.
CS5534-ASZR
✅ 直接替換聯絡詢價
查看資料表 →CS5534-ASZ
✅ 直接替換聯絡詢價
查看資料表 →CS5534-BSZ
✅ 直接替換聯絡詢價
查看資料表 →CS5532-BSZR
✅ 直接替換 ⚠️ 規格未經驗證聯絡詢價
查看資料表 →CS5534-BSZR 最大額定值與電氣特性
| 解析度 | 24 bit |
| Number of Input Channels | 4 (differential) |
| Architecture | Sigma-Delta (charge-balance) with PGIA |
| Maximum Output Data Rate | 3.84 kSPS |
| 介面類型 | Serial (SPI-compatible) |
| 封裝 | 24-SSOP (5.30 mm width) |
| 安裝類型 | Surface Mount |
| Input Type | Differential, unipolar or bipolar |
| Noise Performance | Ultra-low noise (per manufacturer datasheet) |
| Applications Focus | Weigh scale, process control, scientific, medical |
| Packaging | Tape & Reel (R suffix) |
CS5534-BSZR 24-ssop (5.30 mm width) 腳位配置指南
CS5534-BSZR（24-ssop (5.30 mm width) 封裝）的腳位配置。 此類比元件具有輸入、輸出與電源腳位。偏移歸零、補償與致能腳位配置請參閱製造商資料表。適用於訊號調理與放大器電路。
無詳細腳位定義資料： CS5534-BSZR.
請參閱 資料表 以查看完整腳位配置。
典型應用
CS5534-BSZR 適用於 6 應用s: Weigh Scale Load-Cell Front End, Industrial Process Control Transmitters, Medical and Diagnostic Instrumentation, Scientific and Laboratory Instrumentation, Temperature Measurement (Thermocouple / RTD), Battery-Powered Portable Measurement Devices.
Weigh Scale Load-Cell Front End
The CS5534-BSZR fits weigh-scale applications because load-cell bridges output only ~2 mV/V full-scale, requiring microvolt-level noise performance; the integrated ultra-low-noise PGIA amplifies these signals before 24-bit conversion without a discrete instrumentation amplifier stage. In a typical topology, the load-cell differential outputs connect to one of the four input channels, excitation is derived from a precision reference, and the PGIA gain is selected in firmware to match bridge sensitivity. The 3.84 kSPS maximum output rate comfortably supports 50-100 Hz filtering for checkweighers and retail scales, while on-chip calibration removes offset and gain drift over temperature. Multi-channel capability allows one CS5534 to service several load points, reducing BOM cost versus single-channel ADCs.
推薦
Industrial Process Control Transmitters
In 4-20 mA loop-powered transmitters, the CS5534-BSZR digitizes low-level sensor signals - thermocouples, RTDs, and pressure bridges - with high resolution despite the harsh electrical environment of industrial plants. The differential inputs reject common-mode noise picked up along cable runs, and the delta-sigma architecture's line-frequency rejection attenuates 50/60 Hz interference without aggressive external filtering. Four channels let one ADC multiplex multiple process variables, simplifying transmitter designs. Because the PGIA is integrated, gain changes for different sensor types are handled in firmware rather than hardware, enabling one PCB platform across sensor variants. The 3.84 kSPS rate far exceeds the ~10 Hz update needs of process variables, allowing heavy digital averaging for noise reduction.
推薦
Medical and Diagnostic Instrumentation
Medical measurement equipment - blood analyzers, patient scales, and diagnostic sensors - demands the CS5534-BSZR's combination of ultra-low noise, high linearity, and bipolar signal capability. Biologically derived and chemical-sensor signals are frequently microvolt-level and bipolar, exactly the input class the CS5532/34 family was optimized for per the Cirrus Logic product page. The charge-balance delta-sigma modulator delivers 24-bit resolution so that sub-LSB clinical discrimination is achievable after averaging, while the integrated PGIA preserves signal-to-noise ratio at low gain settings. Four differential channels support multi-parameter instruments on a single converter, and the serial interface connects cleanly to isolated digital interfaces required for patient-connected equipment safety compliance.
推薦
Scientific and Laboratory Instrumentation
Scientific instruments such as spectrometers, chromatography detectors, and precision electrometers use the CS5534-BSZR where 24-bit dynamic range resolves signals spanning several decades of amplitude. The ultra-low-noise PGIA front end preserves small detector signals, while bipolar input capability handles negative-going sensor outputs common in photodiode and ionization-chamber circuits. At 3.84 kSPS the converter supports the 1-100 Hz bandwidths typical of analytical instruments, and excess rate is traded for resolution via averaging in the host firmware. The four multiplexed differential channels allow one converter to sequentially digitize multiple detector stages, synchronizing measurements in multi-channel experiments. The serial interface eases integration with microcontroller-based instrument control boards.
推薦
Temperature Measurement (Thermocouple / RTD)
Thermocouple signals of ~40 uV/C demand the CS5534-BSZR's microvolt-level noise floor: with PGIA gain applied, the 24-bit converter resolves fractions of a degree directly, and bipolar input handling accommodates thermocouples driven below ambient. For RTDs, ratiometric measurement against the excitation current reference cancels reference drift, and the differential inputs reject lead-wire common-mode voltage in 3- and 4-wire configurations. The 50/60 Hz line rejection of the delta-sigma modulator is valuable in electrically noisy plants. Four channels let one device monitor multiple measurement points, for example hot-junction reference plus several process temperatures. The 3.84 kSPS rate is far above thermal time constants, allowing aggressive digital filtering for stability.
推薦
Battery-Powered Portable Measurement Devices
Portable instruments - handheld scales, field meters, and battery-powered data loggers - benefit from the CS5534-BSZR's delta-sigma efficiency and single-converter multi-channel architecture, which reduces total component count and board area versus discrete amplifier-plus-ADC chains. The low-level signal capability permits direct connection of bridge and thermocouple sensors without high-power amplification stages, conserving battery energy. The serial interface operates from standard microcontroller SPI peripherals, and the 3.84 kSPS rate permits duty-cycled conversions: the ADC can be clocked, sampled, and powered down between measurements, dramatically extending battery life in logging applications where readings are needed only a few times per second or less.
推薦
推薦產品摘要
工程參考資料，適用於 CS5534-BSZR — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | CS5534-ASZR | CS5534-ASZ | CS5534-BSZ | CS5532-BSZR |
|---|---|---|---|---|---|
| Package | 24-SSOP (5.30 mm width) | 24-SSOP - same | 24-SSOP - same | 24-SSOP - same | 24-SSOP - same |
| Brand | Cirrus Logic Inc. | Cirrus Logic Inc. | Cirrus Logic Inc. | Cirrus Logic Inc. | Cirrus Logic Inc. |
| Resolution | 24 bit | 24 bit | 24 bit | 24 bit | 24 bit |
| Input Channels | 4 differential | 4 differential | 4 differential | 4 differential | 2 differential |
| Max Output Rate | 3.84 kSPS | 3.84 kSPS | 3.84 kSPS | 3.84 kSPS | 3.84 kSPS |
| Accuracy Grade | B grade (tightest specs) | A grade (relaxed specs) | A grade (relaxed specs) | B grade (identical) | B grade |
| Integrated PGIA | Yes | Yes | Yes | Yes | Yes |
| Packaging Format | Tape & Reel (R) | Tape & Reel (R) | Tube/Tray | Tube/Tray | Tape & Reel (R) |
| Interface | Serial (SPI-compatible) | Serial (SPI-compatible) | Serial (SPI-compatible) | Serial (SPI-compatible) | Serial (SPI-compatible) |
主要差異化特點
- B-grade accuracy at A-grade availability (對比CS5534-ASZR)
- Four differential channels vs two (對比CS5532-BSZR)
- Integrated ultra-low-noise PGIA (對比Discrete in-amp + generic 24-bit ADC solutions)
- Honest trade-off: no cross-brand drop-in exists (對比ADS124S08 / AD7124-8)
設計說明
At 24-bit resolution, board-level noise dominates system performance. Place the CS5534-BSZR close to the sensor/connector, route differential input pairs as matched traces with a guard ring, and keep digital lines (SCLK, SDI, SDO) away from analog inputs. Use a solid, low-impedance ground plane and star-connect the analog return. Decouple all supply pins with 100 nF ceramics placed within 2 mm of the pins, plus bulk 10 uF per rail. Follow the layout guidance in the Cirrus Logic CS5534 family datasheet application section.
Use separate, clean analog supply rails and a low-noise voltage reference; reference noise appears directly in the output code multiplied by the PGIA gain. Ratiometric configurations - deriving both bridge excitation and reference from the same source - cancel reference drift and are the standard approach in weigh-scale designs with this family. Sequence digital and analog supplies per the datasheet recommended operating conditions, and avoid sharing the reference ground return with high-current digital loads.
Estimated common mistakes: (1) driving the inputs outside the PGIA common-mode input range specified in the datasheet, which clips rather than saturates gracefully; (2) skipping offset/gain calibration at power-up, forfeiting much of the B-grade accuracy; (3) assuming a modern 24-bit ADC (e.g., ADS124S08) can drop onto the CS5534 footprint - per PartGenie there is no cross-brand pin-to-pin drop-in for this part, so plan a redesign if second-sourcing is required; (4) using A-grade (CS5534-ASZ) parts in designs budgeted around B-grade INL limits.
合規資訊
Compliance status not stated in the verified web data; the 'Z' suffix in Cirrus Logic ordering codes conventionally denotes lead-free/RoHS-compliant packaging, but official confirmation must come from the manufacturer product page or datasheet.
