FUSB340TMX - USB 3.1 10 Gbps 2:1 Data Switch | onsemi
MPN： FUSB340TMX ✓ 啟用中FUSB340TMX 概覽
A USB 3.1 data switch is a high-speed analog multiplexer that routes SuperSpeed differential pairs (TX/RX) between two physical paths while preserving signal integrity at multi-gigahertz frequencies. As a Type-C accessory switch, it is one of several functional blocks in a USB Type-C implementation: Type-C controller -> high-speed data switch -> SBU/AUX switch -> USB-PD controller. The FUSB340TMX specifically occupies the high-speed data mux role, enabling USB-C reversible-cable operation in phones, tablets, and laptops.
Key features include 10 Gbps SuperSpeed Gen2 support, 2:1 switch topology, low insertion loss and return loss over the SuperSpeed frequency range, channel-to-channel skew designed for USB 3.1 compliance, and an operating range suitable for portable and battery-powered designs. The compact 2x2.8 mm TMLP package and minimal external component count simplify PCB layout in space-constrained mobile designs.
The FUSB340 uses an adaptive signal-path topology that maintains 50-ohm characteristic impedance in both the active and idle states to minimize reflections. The wide -3 dB bandwidth accommodates PCIe Gen3 (8 Gbps) and DisplayPort 1.3 (8.1 Gbps) RBR/HBR signalling with margin, making the part usable as a generic high-speed differential mux beyond strict USB roles.
Typical applications include USB Type-C reversible-cable multiplexers, mobile phone and tablet accessory switches, USB 3.1 Gen2 hub fan-out, notebook sideband routing, and Thunderbolt 3 alternate-mode signal multiplexing. The part is also used in docking stations that share USB SuperSpeed lines between multiple hosts.
When designing with the FUSB340TMX, keep the SuperSpeed differential traces length-matched to within 150 mils and route them over a continuous ground reference. Place the decoupling capacitor within 2 mm of the supply pin, and avoid routing any digital control lines directly under the high-speed traces to prevent crosstalk.
This page synthesizes distributor pricing, drop-in alternative parts from the same TI and Microchip ecosystems, and practical layout notes that are not present in the manufacturer datasheet.
直接替換替代品，適用於 FUSB340TMX — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號： FUSB340TMX （相同外形與佔位） — 差異在於 Function, MSL Level, Maximum Data Rate, Number of Channels, Package.
TUSB542
✅ 直接替換📋 參考替代品（不在目錄中）
HD3SS3212IRKSR
✅ 直接替換聯絡詢價
查看資料表 →FUSB340TMX 最大額定值與電氣特性
| 功能 | USB 3.1 SuperSpeed 2:1 data switch |
| Switch Topology | 2:1 (high-speed differential) |
| Maximum Data Rate | 10 Gbps (USB 3.1 Gen2) |
| Supported Protocols | USB 3.1 Gen1/Gen2, PCIe Gen3, SATA, DisplayPort 1.3, Fibre Channel |
| Number of Channels | 1 differential pair per direction (SuperSpeed TX/RX) |
| 工作溫度範圍 | -40C to +85C |
| 封裝 | 18-TMLP (2x2.8 mm) with exposed pad |
| 安裝類型 | Surface Mount |
| MSL 等級 | 1 (Unlimited) |
| RoHS 狀態 | Compliant (ROHS3) |
| REACH Status | SVHC Unaffected |
| Lead-Free | Yes |
| Application Target | Mobile/Type-C reversible-cable accessory switch |
FUSB340TMX 腳位配置
| 腳位 1 | VCC — Positive supply input |
| 腳位 2 | GND — Ground reference |
| 腳位 3 | SEL — Channel-select control input |
| 腳位 4 | NC — Not connected (per datasheet) |
| 腳位 5 | RX1P — SuperSpeed RX path 1, positive |
| 腳位 6 | RX1N — SuperSpeed RX path 1, negative |
| 腳位 7 | RX2P — SuperSpeed RX path 2, positive |
| 腳位 8 | RX2N — SuperSpeed RX path 2, negative |
| 腳位 9 | GND — Ground reference |
| 腳位 10 | TX2N — SuperSpeed TX path 2, negative |
| 腳位 11 | TX2P — SuperSpeed TX path 2, positive |
| 腳位 12 | TX1N — SuperSpeed TX path 1, negative |
| 腳位 13 | TX1P — SuperSpeed TX path 1, positive |
| 腳位 14 | GND — Ground reference |
| 腳位 15 | COM_P — Common-side TX/RX positive |
| 腳位 16 | COM_N — Common-side TX/RX negative |
| 腳位 17 | NC — Not connected (per datasheet) |
| 腳位 18 | EP — Exposed pad - thermal/ground, must be soldered |
典型應用
FUSB340TMX 適用於 6 應用s: USB Type-C Reversible-Cable Mux, Mobile Phone and Tablet Accessory Switch, USB 3.1 Gen2 Hub Fan-Out, Notebook Sideband Routing, Docking Station USB-C Receptacle Sharing, Thunderbolt 3 Alternate-Mode Multiplexing.
USB Type-C Reversible-Cable Mux
The FUSB340TMX's 2:1 SuperSpeed mux topology is purpose-built for USB Type-C reversible-cable designs where the high-speed TX/RX pairs must be flipped depending on cable orientation. With 10 Gbps USB 3.1 Gen2 support it carries the full SuperSpeed channel between the receptacle and the application processor, while the Type-C CC controller (such as the FUSB302 or TUSB320) handles orientation detection and toggles the FUSB340's mux-select pin. Compared with a discrete mux, the FUSB340TMX is characterized for 90-ohm differential impedance and USB 3.1 eye-diagram compliance, reducing compliance-test risk. Designers typically place the part within 25 mm of the Type-C receptacle to keep high-speed trace loss below the Gen2 channel budget.
推薦
Mobile Phone and Tablet Accessory Switch
The FUSB340TMX is explicitly designed for the mobile device market where board area and BOM count are critical. Its 2.0 x 2.8 mm TMLP package occupies less than 6 mm^2 of PCB space and requires no external bias or termination components beyond a single decoupling cap. The 10 Gbps capability allows the same routing channel to be reused for USB 3.1 Gen2 peripherals, DisplayPort alternate-mode docking, and PCIe-based mobile storage accessories. In a typical smartphone reference design, the FUSB340TMX sits between the SoC's USB 3.1 PHY and the Type-C receptacle, allowing the SoC to enumerate a docked accessory at full 10 Gbps without an external mux.
推薦
USB 3.1 Gen2 Hub Fan-Out
In a USB 3.1 Gen2 hub, the FUSB340TMX can route SuperSpeed pairs between an upstream Type-C port and either the hub's downstream PHY or an alternate sideband path, allowing two upstream-facing ports to share a single 10 Gbps PHY with minimal channel-loss penalty. The part's adaptive signal-path topology keeps 50-ohm impedance in both active and idle states, which matters when one branch is parked at idle during single-cable docking scenarios. Combining two FUSB340TMX parts back-to-back is documented in onsemi's reference-layout application note for reversible 4-lane USB-C configurations.
推薦
Notebook Sideband Routing
Modern notebooks share the USB Type-C connector's high-speed pairs between USB 3.1, DisplayPort alternate-mode, and Thunderbolt 3 sideband signalling. The FUSB340TMX provides the 2:1 mux function to flip the SuperSpeed pairs based on the CC-logic-determined orientation and alternate-mode negotiation. Its 10 Gbps ceiling covers USB 3.1 Gen2 and DisplayPort 1.3 HBR3 (8.1 Gbps) headroom, allowing one mux part to handle multiple alternate-mode protocols. Placement near the Type-C receptacle with short 90-ohm differential traces is required to meet the notebook's strict radiated-emissions mask.
推薦
Docking Station USB-C Receptacle Sharing
In a docking station with two USB-C upstream ports, the FUSB340TMX lets one USB 3.1 Gen2 PHY serve both receptacles, with the active port selected by the CC controller. The 2:1 mux topology halves the high-speed mux BOM and simplifies PCB routing around the I/O cluster. Designers benefit from the FUSB340TMX's published -3 dB bandwidth extending past PCIe Gen3, meaning the same part can also switch DisplayPort 1.3 RBR/HBR traffic on the SBU/AUX pairs in advanced docking designs.
推薦
Thunderbolt 3 Alternate-Mode Multiplexing
Thunderbolt 3 and USB4 alternate-mode designs use a 2:1 high-speed mux to switch between USB 3.1 Gen2 and Thunderbolt/DisplayPort HBR3 signalling on the same Type-C pairs. The FUSB340TMX, rated for 10 Gbps and proven for DisplayPort 1.3, fits this role with margin to spare at Thunderbolt 3's 20 Gbps aggregate (using two FUSB340TMX parts in parallel for the four lanes). The exposed-pad TMLP package provides the low-inductance ground return required for the tight Thunderbolt 3 jitter budget.
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推薦產品摘要
工程參考資料，適用於 FUSB340TMX — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | TUSB542 | HD3SS3212 |
|---|---|---|---|
| Brand | onsemi | Texas Instruments | Texas Instruments |
| Package | 18-TMLP (2x2.8 mm) | 18-pin TMLP - same footprint | 18-pin TMLP - same footprint |
| Function | USB 3.1 2:1 data switch | USB 3.1 2:1 data switch | USB 3.1 2:1 data switch |
| Maximum Data Rate | 10 Gbps | 10 Gbps | 10 Gbps |
| Switch Topology | 2:1 differential | 2:1 differential | 2:1 differential |
| Target Market | Mobile/Type-C reversible cable | PC/Type-C accessory | PC/Type-C Alt-Mode |
| Operating Temperature | -40C to +85C | 0C to +70C | -40C to +85C |
| Compliance Documentation | USB-IF (referenced) | TI compliance test reports | TI compliance test reports |
主要差異化特點
- Mobile-first form factor in 2.0 x 2.8 mm TMLP (對比TUSB542)
- Extended -40C to +85C industrial temperature range (對比TUSB542)
- Broad multi-protocol documentation (USB/PCIe/SATA/DP/FC) (對比HD3SS3212)
設計說明
Keep the 90-ohm differential SuperSpeed pairs as short as possible and route over a single unbroken ground reference plane. Length-match TX and RX pairs within 150 mils and maintain 3W spacing between pairs to minimize crosstalk. The exposed pad of the 18-TMLP must be soldered to a continuous ground pour with at least 4 thermal vias to the inner ground plane; unsoldered EP raises insertion loss by 1-2 dB at 5 GHz and degrades USB 3.1 Gen2 eye margin.
Place a 0.1 uF X7R decoupling capacitor within 2 mm of the FUSB340TMX supply pin and a 10 uF bulk capacitor at the mux's power node. Avoid sharing this decoupling loop with digital logic switching on the same rail - SuperSpeed muxes are sensitive to supply noise that translates directly into jitter and insertion-loss variation. Use a ferrite bead if the mux shares a rail with high-current digital blocks.
Verify USB 3.1 Gen2 eye-diagram compliance at production with a USB-IF fixture or a calibrated BERT. The FUSB340TMX datasheet provides S-parameters for the active channel; for an as-designed evaluation, run a 3D-EM simulation (HFSS, CST, or SiWave) and de-embed to verify insertion loss is below the 8.5-13 dB budget at 5 GHz depending on trace length. Skip stubs - via stubs beyond 100 mils add resonance that can close the eye at 5 GHz.
Do not route any digital control lines (SEL, I2C, GPIO) directly under the high-speed differential traces - even 5 mm of parallel digital trace adds coupling at 5 GHz. The SEL pin has setup-time requirements during USB-PD role-swap transitions; tie SEL to the CC controller with a short trace and consider a 10 kohm pull-down to ensure a defined default path if the CC controller is unpowered during boot.
合規資訊
ROHS3 compliant per PartGenie compliance note. REACH SVHC unaffected per PartGenie compliance note. MSL 1 (Unlimited) per PartGenie. AEC-Q100 not applicable for commercial Type-C mobile application.
