LTC7132IY - Dual 25A PolyPhase Step-Down DC/DC Regulator | ADI
MPN： LTC7132IY ✓ 啟用中LTC7132IY 概覽
An LDO (low-dropout) is a type of linear regulator that maintains a stable output voltage even when the input voltage approaches the output voltage. The LTC7132IY belongs to the broader category of DC/DC switching regulators (buck converters) which step down a higher DC voltage to a lower DC voltage using high-frequency switching, an LC output filter, and synchronous MOSFET rectifiers. Within the power management IC hierarchy, it sits as a multiphase synchronous buck controller-regulator, sharing ancestry with point-of-load regulators and PMBus-monitored POL devices used in telecom, datacom, and computing infrastructure.
Key features include 25 A continuous output per phase, parallelable PolyPhase operation for higher currents, differential output voltage sensing, integrated MOSFETs, ±1 percent maximum DC output voltage error, internal temperature monitor, and a programmable switching frequency. The PMBus interface provides output voltage margining, fault telemetry, telemetry of VIN/IOUT/TIN, and write-protection of fault thresholds for adaptive platform power management. A 4 mm × 7 mm footprint delivers high power density.
The LTC7132IY uses a peak current-mode control architecture with cycle-by-cycle current limit and adaptive internal compensation, eliminating the need for external compensation components. The internal drivers, MOSFETs, inductor DC resistance (DCR) sensing network, and bootstrap supply reduce external BOM to input capacitors, output capacitors, inductors, and feedback resistors. The digital interface supports 400 kHz PMBus operation with telemetry of input voltage, output voltage, output current per phase, die temperature, and switching frequency, all readable via standard PMBus commands.
Typical applications include ASIC/FPGA/DSP core voltage regulation, telecom and datacom point-of-load rails, server and storage processor power, industrial automation, and high-density distributed power systems. PolyPhase interleaving reduces input ripple current and output voltage ripple while spreading thermal dissipation across multiple phases, which suits high-current ASICs and FPGAs in networking line cards and base stations.
When designing, calculate worst-case power dissipation at maximum VIN (20 V) and minimum VOUT (0.5 V), where 24.5 V·I drop can reach 12 W per phase and demand substantial PCB copper for thermal management. Select output inductor DCR carefully because it directly affects current-sense accuracy and load-line regulation, and provide input bulk capacitance rated for the combined ripple current of both phases.
直接替換替代品，適用於 LTC7132IY — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號： LTC7132IY （相同外形與佔位） — 差異在於 Digital Interface, Input Voltage Range, Operating Junction Temperature, Output Current per Channel, Output Voltage Range.
LTC7132IY#PBF
✅ 直接替換📋 參考替代品（不在目錄中）
LTC7132MPY
✅ 直接替換📋 參考替代品（不在目錄中）
LTC7151IN
✅ 直接替換📋 參考替代品（不在目錄中）
LTC7132HY
✅ 直接替換 ⚠️ 規格未經驗證📋 參考替代品（不在目錄中）
LTC7132IY-N1
✅ 直接替換 ⚠️ 規格未經驗證📋 參考替代品（不在目錄中）
LTC7151IN-PBF
✅ 直接替換 ⚠️ 規格未經驗證📋 參考替代品（不在目錄中）
LTC7132IY 最大額定值與電氣特性
| 拓撲 | Dual synchronous step-down (buck) PolyPhase DC/DC regulator |
| 輸入電壓範圍 | 4.5 V to 20 V |
| 輸出電壓範圍 | 0.5 V to 5.5 V (adjustable) |
| Output Current per Channel | 25 A continuous |
| Total Output Current | 50 A (dual-phase paralleled) |
| 輸出數量 | 2 |
| 切換頻率 | Programmable |
| Output Voltage Accuracy | ±1% maximum DC error |
| Digital Interface | I2C/PMBus-compliant with on-chip NVM |
| Architecture | Constant-frequency peak current-mode control |
| 封裝 | 140-ball BGA (FBGA) |
| 工作接面溫度 | -40C to +125C (I-grade) |
| 安裝類型 | Surface Mount |
| RoHS 狀態 | Compliant |
| Telemetry | VIN, VOUT, IOUT per phase, die temperature, switching frequency |
| Fault Protection | Overcurrent, overvoltage, overtemperature, write-protected fault thresholds |
LTC7132IY 140-ball bga (fbga) 腳位配置指南
LTC7132IY（140-ball bga (fbga) 封裝）的腳位配置。 此功率元件具有閘極、汲極與源極端子。對於非極性封裝，請參閱製造商資料表以取得確切的第 1 腳方向與佈局詳細資訊。常見應用包括電源設計、馬達驅動與負載切換。
無詳細腳位定義資料： LTC7132IY.
請參閱 資料表 以查看完整腳位配置。
典型應用
LTC7132IY 適用於 7 應用s: ASIC/FPGA Core Voltage Regulation, Telecom and Datacom Point-of-Load, Server and Storage Processor Power, Industrial Automation Controllers, High-Density Distributed Power Systems, Test and Measurement Equipment, Automotive Computing and ADAS.
ASIC/FPGA Core Voltage Regulation
The LTC7132IY's 25 A per channel and 0.5 V to 5.5 V adjustable output make it ideal for ASIC and FPGA core rails. Its 0.85 V, 1.0 V, and 1.2 V set points align with common core voltages used by high-performance FPGAs and ASICs in networking and compute platforms. Differential output sensing maintains ±1% DC accuracy even at high current steps, and the PMBus telemetry allows the system controller to track core power consumption in real time for thermal and energy management.
推薦
Telecom and Datacom Point-of-Load
In telecom and datacom line cards, the LTC7132IY provides a regulated 0.5-5.5 V bus from the standard 12 V intermediate distribution voltage. Its 4.5 V to 20 V input accommodates both 5 V and 12 V bus architectures commonly found in ATCA and µTCA platforms. The PolyPhase dual 25 A configuration halves input ripple current compared to single-phase designs, reducing bulk capacitor stress and EMI. PMBus allows the central shelf manager to monitor, margin, and fault-log each card's power consumption.
推薦
Server and Storage Processor Power
The LTC7132IY's 50 A total output (when paralleled) supports processor and memory subsystem power requirements in hyperscale servers and storage arrays. Its compact 140-ball BGA delivers high power density that fits dense 1U and 2U server form factors. The integrated current-mode control architecture provides fast transient response to load steps, which is critical for CPU and GPU turbo-mode power excursions. Programmable fault thresholds enable platform-specific OVP, UVP, and OTP responses.
推薦
Industrial Automation Controllers
The LTC7132IY's -40C to +125C industrial operating junction temperature range makes it well-suited for factory automation PLCs and motion control boards. The device's 4.5 V to 20 V input accepts 24 V industrial bus supplies with adequate headroom for transient events. Its dual 25 A channels can power a digital signal processor plus its I/O subsystem from a single IC, reducing BOM and PCB area in space-constrained industrial enclosures.
推薦
High-Density Distributed Power Systems
Distributed power architectures (DPA) in broadcast, aerospace, and industrial systems use an intermediate 12 V or 24 V bus with multiple isolated and non-isolated POL converters. The LTC7132IY provides two independent 25 A POL rails from the bus, supporting high-density DPA topologies. Its PMBus compliance enables platform-level power optimization, including dynamic VID adjustment for energy-aware operation and predictive maintenance via logged fault telemetry.
推薦
Test and Measurement Equipment
Precision test equipment and ATE systems require tightly regulated, low-noise power rails for analog front-end and ADC/DAC subsystems. The LTC7132IY's ±1% DC accuracy and PMBus telemetry support programmable power architectures where each rail is software-margined and characterized. Its adjustable output from 0.5 V to 5.5 V covers digital logic, analog, and mixed-signal IC supply voltages, while the PolyPhase operation reduces conducted EMI that could couple into sensitive measurement paths.
推薦
Automotive Computing and ADAS
Advanced driver-assistance systems (ADAS) and autonomous-driving compute platforms require high-current, tightly regulated rails from automotive 12 V battery buses. The LTC7132 family is suitable for prototype and pre-production ADAS power designs, though automotive qualification (AEC-Q100) requires the Q-graded variant. Its dual 25 A channels can power an ADAS SoC plus its companion memory subsystem, with PMBus telemetry enabling real-time power monitoring of safety-critical compute domains.
推薦
推薦產品摘要
工程參考資料，適用於 LTC7132IY — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | LTC7132IY#PBF | LTC7132MPY | LTC7151IN | LTC7132HY | LTC7132IY-N1 |
|---|---|---|---|---|---|---|
| Brand | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| Package | 140-ball BGA (FBGA) | 140-ball BGA (FBGA) - same | 140-ball BGA (FBGA) - same | 140-ball BGA (FBGA) - same | 140-ball BGA (FBGA) - same | 140-ball BGA (FBGA) - same |
| Input Voltage Range | 4.5 V to 20 V | 4.5 V to 20 V | 4.5 V to 20 V | Higher VIN, same family | 4.5 V to 20 V | 4.5 V to 20 V |
| Output Current per Channel | 25 A | 25 A | 25 A | 25 A | 25 A | 25 A |
| Output Voltage Range | 0.5 V to 5.5 V | 0.5 V to 5.5 V | 0.5 V to 5.5 V | 0.5 V to 5.5 V | 0.5 V to 5.5 V | 0.5 V to 5.5 V |
| Operating Junction Temperature | -40C to +125C (I-grade) | -40C to +125C | MP-grade extended | -40C to +125C | H-grade higher temp | -40C to +125C |
| Digital Interface | PMBus/I2C with NVM | PMBus/I2C with NVM | PMBus/I2C with NVM | PMBus/I2C with NVM | PMBus/I2C with NVM | PMBus/I2C with NVM |
| 1ku List Price (USD) | Starting from $13.82 | Starting from $13.82 | Higher (MP-grade) | Comparable family pricing | Higher (H-grade) | Comparable family pricing |
主要差異化特點
- Dual 25 A PolyPhase architecture in 140-ball BGA (對比LTC7151IN)
- Industrial -40C to +125C operating junction range (對比LTC7132MPY)
- Full PMBus/I2C telemetry and NVM storage (對比LTC7151IN)
設計說明
Estimated: at VIN = 12 V, VOUT = 0.85 V, and 25 A per channel, the LTC7132IY dissipates approximately 12 W per phase (P_diss = (VIN - VOUT) * IOUT). The 140-ball BGA thermal pad must be soldered to a multi-layer PCB with substantial inner copper planes (2 oz minimum recommended) and thermal vias directly under the package to keep junction temperature below 110C at full load. Forced-air cooling or an attached heatsink is strongly recommended for continuous 25 A operation.
Place input bulk capacitors as close as possible to the VIN and PGND balls, using a combination of ceramic (22 uF X7R) and polymer or electrolytic (100-470 uF) capacitors to handle both high-frequency ripple and bulk energy storage. Route the SW node traces on an inner layer with sufficient copper width (0.5 mm minimum) to minimize voltage ringing. Keep the feedback traces short and surround them with a ground shield to avoid noise pickup in the ±1% accuracy regulation loop.
Do not exceed the absolute maximum VIN of 22 V; add a TVS or surge stopper such as the LTC4366 on the input bus for load-dump protection in automotive or industrial applications. Verify the inductor DCR matches the value programmed into the LTC7132IY's current-sense network, because mismatched DCR degrades current-limit accuracy and load-line behavior. Always validate that PMBus address pins (ADDR0, ADDR1) are tied to the correct levels before issuing commands - floating address pins may cause communication errors with the system host.
PMBus SDA and SCL traces should be routed with 50 ohm controlled impedance and terminated pull-up resistors (typically 10 kohm at 100 kHz or 2.2 kohm at 400 kHz) close to the LTC7132IY balls. Avoid running PMBus traces parallel to high-dv/dt SW nodes; if crossing is unavoidable, route them on orthogonal layers with a continuous ground plane in between to minimize capacitive coupling.
合規資訊
RoHS compliant per Analog Devices product page. Lead-free (PBF suffix indicates Pb-free terminal finish). I-grade part is not AEC-Q100 qualified; consult Analog Devices for the Q-graded automotive variant. Halogen-free status not explicitly stated in available data.
