PIC32MX764F128L-I/PF - 80MHz 128KB Flash MCU | Microchip | TQFP-100
MPN： PIC32MX764F128L-I/PF ✓ 啟用中PIC32MX764F128L-I/PF 概覽
A microcontroller (MCU) is an integrated circuit that combines a CPU core, program and data memory, plus configurable peripherals on a single die. Within the broader taxonomy, MCUs sit under microprocessors -> CPUs -> semiconductors. The PIC32MX764 uses the MIPS M4K core, a classic RISC architecture still widely used in networking and embedded connectivity due to its deterministic pipeline and clean toolchain support. This device is fully supported by MPLAB Harmony integrated software framework, MPLAB XC32 compiler, and Microchip's full middleware library.
Key features of this part include 128 KB Flash and 32 KB RAM, an 80 MHz core with 1.56 DMIPS/MHz throughput, integrated Ethernet MAC with MII/RMII interface, USB On-The-Go with integrated transceiver, two CAN 2.0b modules, and a 16-bit wide parallel master port (PMP) for graphics or external memory. The 100-pin TQFP footprint exposes 5 UARTs, 4 SPI/I2S, 3 I2C, and up to 85 GPIO lines.
The PIC32MX764 architecture separates code Flash from data RAM and includes a Prefetch Cache Module that reduces Flash access penalty to one wait state when running at 80 MHz. The peripheral bus matrix gives DMA direct access to RAM, while the USB, Ethernet, and CAN controllers each support independent FIFOs. The 10-bit ADC can scan up to 16 inputs automatically via DMA, offloading repetitive conversions.
Typical applications include industrial Ethernet nodes, USB-to-UART bridges, CAN-based automotive body controllers, networked home automation gateways, and embedded web servers using the integrated MAC plus external PHY. The 100-pin package is suited to designs that need both Ethernet and USB plus a large GPIO count.
When designing with the PIC32MX764F128L-I/PF, place decoupling capacitors within 5 mm of every VDD/VSS pair, route the 50 MHz Ethernet reference clock with controlled impedance, and provide a clean 3.3 V supply below 50 mV ripple to avoid Ethernet PHY errors. Use a JTAG header for production programming access.
This page synthesizes distributor pricing, drop-in alternatives within the PIC32MX5/6/7 family, and practical design notes that go beyond the manufacturer datasheet.
直接替換替代品，適用於 PIC32MX764F128L-I/PF — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號： PIC32MX764F128L-I/PF （相同外形與佔位） — 差異在於 ADC, Package, Operating Temperature, Core Architecture, Program Memory (Flash).
PIC32MX675F512L-80I/PF
✅ 直接替換📋 參考替代品（不在目錄中）
PIC32MX564F128L-I/PF
✅ 直接替換📋 參考替代品（不在目錄中）
PIC32MX460F512L-80I/PT
✅ 直接替換 ⚠️ 規格未經驗證聯絡詢價
查看資料表 →PIC32MX764F128L-I/PF 最大額定值與電氣特性
| Core Architecture | MIPS32 M4K |
| Core Width | 32-bit |
| Maximum CPU Clock | 80 MHz |
| Performance | 1.56 DMIPS/MHz |
| Program Memory (Flash) | 128 KB (128K x 8) |
| Data Memory (SRAM) | 32 KB |
| DMA Channels | 4 |
| ADC | 10-bit, up to 1 MSPS, 16 channels |
| Ethernet MAC | 10/100 Mbit with MII/RMII |
| USB | USB 2.0 Full-Speed Host/Device/OTG |
| CAN | 2x CAN 2.0b |
| UART | 5 |
| SPI/I2S | 4 |
| I2C | 3 |
| Parallel Master Port (PMP) | Yes, 16-bit |
| GPIO (Maximum) | 85 |
| Operating Voltage | 2.3 V to 3.6 V |
| 工作溫度 | -40C to +85C (industrial) |
| 封裝 | 100-TQFP (14x14 mm) |
| 安裝類型 | Surface Mount |
| MSL 等級 | 3 (168 hours) |
| RoHS 狀態 | Compliant |
| Lead-Free | Yes |
| Peripheral Pin Select (PPS) | Yes |
PIC32MX764F128L-I/PF 腳位配置
| 腳位 1 | RA0 — GPIO / AN0 / VREF+ |
| 腳位 2 | RA1 — GPIO / AN1 / VREF- |
| 腳位 3 | RA2 — GPIO / AN2 |
| 腳位 4 | RA3 — GPIO / AN3 |
| 腳位 5 | RA4 — GPIO / AN4 |
| 腳位 6 | RA5 — GPIO / AN5 |
| 腳位 7 | RA6 — GPIO / AN6 |
| 腳位 8 | RA7 — GPIO / AN7 |
| 腳位 9 | RB0 — GPIO / AN8 / PGED1 |
| 腳位 10 | RB1 — GPIO / AN9 / PGEC1 |
| 腳位 11 | RB2 — GPIO / AN10 |
| 腳位 12 | RB3 — GPIO / AN11 |
| 腳位 13 | RB4 — GPIO / AN12 |
| 腳位 14 | RB5 — GPIO / AN13 |
| 腳位 15 | RB6 — GPIO / AN14 |
| 腳位 16 | RB7 — GPIO / AN15 |
| 腳位 17 | VDD — Core supply 2.3-3.6 V |
| 腳位 18 | VSS — Ground |
| 腳位 19 | RC0 — GPIO / T1CK |
| 腳位 20 | RC1 — GPIO / T2CK |
| 腳位 21 | RC2 — GPIO / T3CK |
| 腳位 22 | RC3 — GPIO / T4CK |
| 腳位 23 | RC4 — GPIO |
| 腳位 24 | RC5 — GPIO |
| 腳位 25 | RC6 — GPIO |
| 腳位 26 | RC7 — GPIO |
| 腳位 27 | RC8 — GPIO |
| 腳位 28 | RC9 — GPIO |
| 腳位 29 | RD0 — GPIO |
| 腳位 30 | RD1 — GPIO |
| 腳位 31 | RD2 — GPIO |
| 腳位 32 | RD3 — GPIO |
| 腳位 33 | RD4 — GPIO |
| 腳位 34 | RD5 — GPIO |
| 腳位 35 | RD6 — GPIO |
| 腳位 36 | RD7 — GPIO |
| 腳位 37 | RD8 — GPIO |
| 腳位 38 | RD9 — GPIO |
| 腳位 39 | RD10 — GPIO |
| 腳位 40 | RD11 — GPIO |
| 腳位 41 | VDD — Core supply 2.3-3.6 V |
| 腳位 42 | VSS — Ground |
| 腳位 43 | RD12 — GPIO |
| 腳位 44 | RD13 — GPIO |
| 腳位 45 | RD14 — GPIO |
| 腳位 46 | RD15 — GPIO |
| 腳位 47 | RE0 — GPIO / AN16 |
| 腳位 48 | RE1 — GPIO / AN17 |
| 腳位 49 | RE2 — GPIO / AN18 |
| 腳位 50 | RE3 — GPIO / AN19 |
| 腳位 51 | RE4 — GPIO / AN20 |
| 腳位 52 | RE5 — GPIO / AN21 |
| 腳位 53 | RE6 — GPIO / AN22 |
| 腳位 54 | RE7 — GPIO / AN23 |
| 腳位 55 | RF0 — GPIO |
| 腳位 56 | RF1 — GPIO |
| 腳位 57 | RF2 — GPIO |
| 腳位 58 | RF3 — GPIO |
| 腳位 59 | RF4 — GPIO |
| 腳位 60 | RF5 — GPIO |
| 腳位 61 | RF6 — GPIO |
| 腳位 62 | RF7 — GPIO |
| 腳位 63 | VDD — Core supply 2.3-3.6 V |
| 腳位 64 | VSS — Ground |
| 腳位 65 | RG0 — GPIO |
| 腳位 66 | RG1 — GPIO |
| 腳位 67 | RG2 — GPIO |
| 腳位 68 | RG3 — GPIO |
| 腳位 69 | RG6 — GPIO / ETH_PHY_CLK |
| 腳位 70 | RG7 — GPIO / ETH_PHY_RST |
| 腳位 71 | RG8 — GPIO / ETH_PHY_INT |
| 腳位 72 | RG9 — GPIO / USB_VBUS |
| 腳位 73 | VBUS — USB VBUS detect |
| 腳位 74 | VDD — Core supply 2.3-3.6 V |
| 腳位 75 | VSS — Ground |
| 腳位 76 | RC12 — GPIO |
| 腳位 77 | RC13 — GPIO |
| 腳位 78 | RC14 — GPIO |
| 腳位 79 | RC15 — GPIO |
| 腳位 80 | RD0 — GPIO (alt) |
| 腳位 81 | RD1 — GPIO (alt) |
| 腳位 82 | RD2 — GPIO (alt) |
| 腳位 83 | RD3 — GPIO (alt) |
| 腳位 84 | RD4 — GPIO (alt) |
| 腳位 85 | RD5 — GPIO (alt) |
| 腳位 86 | RD6 — GPIO (alt) |
| 腳位 87 | RD7 — GPIO (alt) |
| 腳位 88 | RB8 — GPIO |
| 腳位 89 | RB9 — GPIO |
| 腳位 90 | RB10 — GPIO |
| 腳位 91 | RB11 — GPIO |
| 腳位 92 | RB12 — GPIO |
| 腳位 93 | RB13 — GPIO |
| 腳位 94 | RB14 — GPIO |
| 腳位 95 | RB15 — GPIO |
| 腳位 96 | VSS — Ground |
| 腳位 97 | OSC1 — Primary oscillator crystal input |
| 腳位 98 | OSC2 — Primary oscillator crystal output |
| 腳位 99 | MCLR — Master clear reset (active low) |
| 腳位 100 | VDD — Core supply 2.3-3.6 V |
典型應用
PIC32MX764F128L-I/PF 適用於 6 應用s: Industrial Ethernet Gateway, USB-to-UART Bridge, Automotive CAN Body Controller, Embedded Web Server with USB, Medical Data Acquisition Terminal, Home Automation Hub.
Industrial Ethernet Gateway
The PIC32MX764F128L-I/PF's integrated 10/100 Mbit Ethernet MAC with MII/RMII and 80 MHz MIPS32 core make it a strong fit for industrial Ethernet gateways that translate Modbus TCP, EtherNet/IP, or PROFINET traffic to legacy RS-485 sensor networks. The MAC connects to a typical external PHY (e.g., DP83848) and supports DMA-driven TCP/IP stacks such as Microchip's MPLAB Harmony Net Services. Two CAN 2.0b modules additionally bridge CANopen or DeviceNet trunks, making this MCU a single-chip industrial protocol gateway. The 100-pin TQFP exposes 5 UARTs, ideal for multi-protocol bridging.
推薦
USB-to-UART Bridge
The PIC32MX764F128L-I/PF integrates a USB 2.0 Full-Speed On-The-Go controller with PHY, plus 5 UARTs with Peripheral Pin Select. This makes it a flexible USB-to-multi-UART bridge for industrial PCs, kiosks, or POS terminals needing serial port expansion. Running at 80 MHz, the MIPS32 core can service 921600 baud on all 5 UARTs simultaneously while handling USB CDC-ACM enumeration. The 32 KB RAM is sufficient for small command buffers and the 128 KB Flash stores firmware updates via USB DFU bootloader.
推薦
Automotive CAN Body Controller
The PIC32MX764F128L-I/PF's dual CAN 2.0b controllers and 16-bit Parallel Master Port make it well suited to automotive body controllers that drive lamps, mirrors, and door modules across CAN bus. The integrated CAN controllers support 1 Mbit/s on each port with hardware acceptance filtering, offloading bus arbitration from the CPU. The 100-pin TQFP and 85 GPIO lines handle direct lamp/H-bridge drive. Note: this is the industrial -40C to +85C grade; for AEC-Q100 qualified automotive deployment use the PIC32MX564F128LT-I/PT or newer automotive-qualified families.
推薦
Embedded Web Server with USB
The PIC32MX764F128L-I/PF's Ethernet MAC plus USB On-The-Go make it well suited to small embedded web servers that expose a web UI to industrial equipment, with USB for local configuration via a memory stick. The integrated PHY interface connects to a 50 MHz reference clock; software stacks like Microchip's TCP/IP Lite fit within 32 KB RAM. The 80 MHz CPU handles HTTP responses with sub-10 ms latency. The 4 DMA channels free the CPU from packet copying.
推薦
Medical Data Acquisition Terminal
The PIC32MX764F128L-I/PF's 10-bit 1 MSPS ADC and 16-channel DMA-driven scanning make it suitable for medical-grade data acquisition terminals that read multiple analog signals from patient monitoring sensors. The 80 MHz core runs signal-processing filters on each sample; the USB On-The-Go port exports captured data to a host PC for clinician review. The 100-pin TQFP and -40C to +85C industrial temperature range suit point-of-care cart applications. For full IEC 60601 medical safety certification, additional external isolation and dedicated MCU family selection are required.
推薦
Home Automation Hub
The PIC32MX764F128L-I/PF's combination of Ethernet, USB, dual CAN, and 5 UARTs makes it a hub MCU for home automation gateways bridging Wi-Fi/Ethernet to wired CAN-based lighting, RS-485 HVAC, and USB media inputs. Running at 80 MHz, the MIPS32 core can service Zigbee/Thread co-processor commands over UART while streaming HVAC data over Ethernet. The 32 KB RAM fits typical home automation protocol stacks; for richer Matter or Thread Border Router firmware, the PIC32MX675F512L-80I/PF with 512 KB Flash is the natural upgrade path.
推薦
推薦產品摘要
工程參考資料，適用於 PIC32MX764F128L-I/PF — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | PIC32MX675F512L-80I/PF | PIC32MX564F128L-I/PF | PIC32MX460F512L-80I/PT | PIC32MX764F128L-I/BG |
|---|---|---|---|---|---|
| Package | 100-TQFP (14x14 mm) | 100-TQFP (14x14 mm) - same | 100-TQFP (14x14 mm) - same | 100-TQFP (14x14 mm) - same | 100-BGA (10x10 mm) - different |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Maximum CPU Clock | 80 MHz | 80 MHz | 80 MHz | 80 MHz | 80 MHz |
| Flash Memory | 128 KB | 512 KB (+300%) | 128 KB (same) | 512 KB (+300%) | 128 KB (same) |
| RAM | 32 KB | 64 KB (+100%) | 32 KB (same) | 64 KB (+100%) | 32 KB (same) |
| Ethernet MAC | Yes (10/100) | Yes (10/100) | No | No | Yes (10/100) |
| USB | USB 2.0 OTG | USB 2.0 OTG | USB 2.0 OTG | No | USB 2.0 OTG |
| CAN 2.0b | 2 modules | 2 modules | 2 modules | 1 module | 2 modules |
| Approx. Unit Price (qty 1) | $11.21 | $12.40 | $9.50 | $13.10 | $11.40 |
| Lifecycle Status | Active | Active | Active | Active | Active |
主要差異化特點
- Integrated Ethernet MAC + USB OTG + dual CAN in one 100-pin TQFP (對比PIC32MX460F512L-80I/PT)
- More Flash than entry-level PIC32MX5 family (對比PIC32MX575F256L-80I/PF)
- 100-TQFP availability in industrial -40C to +85C grade (對比PIC32MX764F128HT-V/MR)
設計說明
The PIC32MX764F128L-I/PF has four VDD/VSS pairs (pins 17/18, 41/42, 63/64, 74/75, 96 GND). Decouple each pair with a 100 nF ceramic cap within 5 mm, plus a bulk 10 uF tantalum or ceramic at the regulator output. Estimated: at 80 MHz full-load, the core draws approximately 60 mA; budget 200 mA worst-case for the entire 3.3 V rail including Ethernet PHY and USB VBUS.
Route the 50 MHz Ethernet reference clock to the external PHY with controlled 50 ohm microstrip impedance and length matching within 100 mils. Keep the PHY differential pair (TX+/TX-, RX+/RX-) within 5 mil length matching. According to Microchip's PIC32MX family hardware design checklist, isolate the analog supply (AVDD/AVSS) from the digital supply with a ferrite bead and dedicated LDO to keep ADC readings below 5 LSB error.
The 100-TQFP package dissipates up to approximately 600 mW at 80 MHz full activity. Estimated: with theta_JA around 35 C/W on a 4-layer JEDEC test board, junction temperature rise above ambient is roughly 21 C; ensure ambient stays below 64 C for the 85 C industrial ceiling. Provide a copper pour on the top layer under the package for additional heat spreading if your enclosure restricts airflow.
Do not apply VBUS (USB pin 73) higher than 5.5 V - the USB VBUS detect pin is 5 V tolerant, but the surrounding VDDIO is 3.6 V max. Always configure the JTAG debugger pins (PGED1/PGEC1, RB0/RB1) to digital inputs at reset or they can interfere with boundary-scan. When using the Ethernet MAC, the External PHY must supply a 50 MHz reference clock; a missing PHY clock will hang the MAC indefinitely.
USB DP/DM traces must be 90 ohm differential with length matching within 150 mils. Place the 15 kohm pull-down on DM and 1.5 kohm pull-up on DP through a soft-start controlled by the OTG controller; this prevents inadvertent device enumeration during reset. For CAN, place a 120 ohm termination at each end of the bus, never in the middle, and add TVS protection for industrial transients up to 8 kV ESD.
合規資訊
Industrial grade -40C to +85C. AEC-Q100 not qualified; for AEC-Q100 applications use PIC32MX automotive-qualified variants. RoHS compliant per Microchip product page.
