10AX115U3F45I2SG vs 10AX115U3F45E2SG 对比
详细并排对比 10AX115U3F45I2SG 出自 Intel 和 10AX115U3F45E2SG 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | 10AX115U3F45I2SG | 10AX115U3F45E2SG |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $7,450.00 | $5,800.00 |
| Series | Arria 10 GX | — |
| Logic Elements | 1,150,000 | — |
| Embedded Memory (M20K) | 68,857,856 bits (67.5 Mbit) | — |
| Embedded Memory Blocks | 1,518 | — |
| DSP Blocks (18x19 Multipliers) | 1,518 | — |
| User I/O Pins | 480 | — |
| Transceivers | 24 channels | — |
| Max Transceiver Data Rate | 14.4 Gbps | — |
| Hard Memory Controller | Yes (DDR4 / DDR3 / QDRII+) | — |
| Process Technology | TSMC 20 nm | — |
| 封装 | 1932-ball FCBGA (F45) | 1932-ball FCBGA (F45, 45×45 mm, 1.0 mm pitch) |
| Operating Temperature Grade | Industrial (-40C to +100C junction) | — |
| Speed Grade | I2 | -2 (E2 commercial/extended) |
| Configuration Scheme | AES-256 encrypted, partial reconfiguration | — |
| 安装类型 | Surface Mount | — |
| RoHS 状态 | Compliant | — |
| Lead-Free | Yes | — |
| MSL 等级 | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL rating per JEDEC J-STD-020] |
| Family | — | Arria 10 GX |
| Logic Elements (LE) | — | 1,150,000 |
| Adaptive Logic Modules (ALM) | — | 427,200 |
| Embedded Memory Bits | — | 68,857,856 (≈ 52.99 Mbit) |
| Number of Transceivers | — | [DATA_NEEDED: per-die transceiver count, F45 package variant] |
| Maximum Transceiver Data Rate | — | 17.4 Gbps |
| DSP Blocks | — | Variable-precision, hardened floating-point |
| Hard Memory Controllers | — | 2 (DDR4/DDR3/QDRII+/RLDRAM3) |
| Hard PCIe Gen3 IP Blocks | — | 2 × PCIe Gen3 (x8/x4/x2/x1) |
| Process Node | — | 20 nm Tri-Gate (Intel) |
| 工作温度 | — | Industrial (junction -40 °C to +100 °C) – device grade U |
| Supply Voltage Core | — | [DATA_NEEDED: VCC/VCCP core voltage] |
| Configuration Method | — | FPGA configuration via serial/parallel flash, JTAG |
| RoHS Compliance | — | Compliant |