5CSEBA4U19C6N vs 5CSEBA4U19A7N 对比

详细并排对比 5CSEBA4U19C6N 出自 Intel 和 5CSEBA4U19A7N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 5CSEBA4U19C6N 5CSEBA4U19A7N
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $74.50 $99.90
Family Cyclone V SE SoC FPGA Cyclone V SE SoC FPGA
Logic Elements 40,000 (40K LE) 40 K
Hard Processor System (HPS) Dual-core ARM Cortex-A9 MPCore with CoreSight —
Maximum HPS Clock Frequency 925 MHz —
封装 484-pin UFBGA / UBGA (19x19 mm) 484-UBGA (U19), 19x19 mm, 1.0 mm pitch
FPGA User I/O 161 (per Altera product page) —
Process Technology TSMC 28 nm low-power —
Memory Controller Hard controller for DDR2 / DDR3 / LPDDR2 —
DSP Blocks Variable-precision DSP blocks (18x18 multipliers) —
Embedded Memory M10K memory blocks 3.4 Mbits (M9K)
Encryption Support AES encryption (per LCSC listing) —
Error Detection SEU error detection and correction support —
工作温度 0C to +85C (commercial grade) —
安装类型 Surface Mount (BGA) Surface Mount (BGA)
RoHS 状态 Compliant Compliant
Hard Processor System — Dual ARM Cortex-A9 MPCore with CoreSight
Adaptive Logic Modules — [DATA_NEEDED: ALM count]
DSP Blocks (18x18 Multipliers) — 224
PLLs — [DATA_NEEDED: PLL count]
HPS Maximum Application Clock — 925 MHz
Memory Interfaces — DDR3, DDR3L, LPDDR2 (via HPS); soft DDR3/2 in FPGA
User I/O — 161
工作结温 — -40C to +125C (automotive) / -40C to +100C (industrial)
Process Node — TSMC 28 nm low-power
Core Voltage — 1.1 V (typical)
MSL 等级 — 3 (168 hours)

数据手册与资源

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