ADC12DL040CIVS vs ADC12040CIVY 对比
详细并排对比 ADC12DL040CIVS 出自 Texas Instruments 和 ADC12040CIVY 出自 Texas Instruments。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Texas Instruments
ADC12DL040CIVS - Dual 12-Bit 40 MSPS 3V ADC | Texas Instruments
ADC12DL040CIVS Nrnd
规格对比
| 参数 | ADC12DL040CIVS | ADC12040CIVY |
|---|---|---|
| 品牌 | Texas Instruments | Texas Instruments |
| 分类 | ADC/DAC | ADC/DAC |
| 生命周期状态 | 不推荐新设计 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $11.85 | $5.52 |
| 分辨率 | 12 Bits | 12 bit |
| Number of Channels | 2 (dual, simultaneous sampling) | 1 input |
| Sample Rate (per channel) | 40 MSPS | — |
| Architecture | Pipelined CMOS | Pipelined |
| Analog Supply Voltage | 3.0 V (2.7 V to 3.6 V range) | — |
| Digital Output Driver Supply | 2.4 V to 3.6 V (separate DVDD) | — |
| Power Dissipation (typical) | 210 mW | — |
| Power-Down Mode | Yes | — |
| SNR (fIN = 10 MHz) | 69 dB (typical) | — |
| SFDR (fIN = 10 MHz) | 85 dB (typical) | — |
| DNL (Differential Non-Linearity) | ±0.3 LSB (typical) | — |
| INL (Integral Non-Linearity) | [DATA_NEEDED: INL spec] | — |
| Internal Reference | Yes (factory-trimmed, not user-adjustable) | — |
| Sample-and-Hold | Internal, dual | — |
| Duty Cycle Stabilizer | Yes | — |
| Multiplexed Output Mode | Yes (channels share single 12-bit bus) | — |
| Output Format | Straight Binary, offset binary, 2's complement (per pin strapping) | — |
| Input Clock | Single-ended or differential; 50 Ω terminated internally | — |
| 工作温度 | -40 °C to +85 °C (industrial) | — |
| 封装 | 64-pin TQFP (PAG) 10x10 mm, surface-mount | 32-LQFP (NEY) 7x7 mm |
| MSL (Moisture Sensitivity Level) | [DATA_NEEDED: MSL level] | — |
| Lead Finish / RoHS | Lead-free / RoHS status depends on orderable suffix (see datasheet ordering info) | — |
| 采样率 | — | 40 MSPS (min 40 MSPS over temperature) |
| 电源电压 | — | +5V ±5% (single supply) |
| Power Consumption | — | 340 mW (typ) at 40 MHz |
| Differential Non-Linearity (DNL) | — | ±0.4 LSB (typ) |
| Signal-to-Noise Ratio (SNR) | — | 69 dB (typ) at fIN = 10 MHz |
| Effective Number of Bits (ENOB) | — | 11.2 bits (typ) at fIN = 10 MHz |
| Input Type | — | Differential (single-ended capable) |
| Reference Type | — | External, with internal buffer |
| Digital Output Interface | — | Parallel, CMOS, straight binary |
| Digital Output Logic Levels | — | 2.35V to 5V compatible |
| Power Down Mode | — | On-chip (low quiescent between conversions) |
| 工作温度范围 | — | -40C to +85C (industrial) |
| 安装类型 | — | Surface Mount |
| Pin Family Compatibility | — | Pin compatible with ADC12010, ADC12020, ADC12L063, ADC12L066 |
| RoHS 状态 | — | Compliant (NOPB suffix variants only; check exact suffix) |