CDK2307CILP64 vs CDK2308CILP64 对比

详细并排对比 CDK2307CILP64 出自 MaxLinear 和 CDK2308CILP64 出自 MaxLinear。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

MaxLinear
CDK2307CILP64 CDK2307CILP64 - Dual 65MSPS 12/13-bit ADC | MaxLinear

CDK2307CILP64 - Dual 65MSPS 12/13-bit ADC | MaxLinear

CDK2307CILP64 ✓ 量产中

规格对比

参数 CDK2307CILP64 CDK2308CILP64
品牌 MaxLinear MaxLinear
分类 ADC/DAC ADC/DAC
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $5.41 $10.85
Manufacturer MaxLinear (formerly Exar / Cadeka) —
Part Number CDK2307CILP64 —
功能 Dual-channel Analog-to-Digital Converter (ADC) —
Number of Channels 2 2 (dual)
分辨率 12-bit / 13-bit 10 bit
Maximum Sample Rate 80 MSPS (12-bit), 65 MSPS (13-bit) —
Supported Sample Rates 20 / 40 / 65 / 80 MSPS —
Converter Architecture Pipelined with digital error correction —
Input Type Differential analog inputs Differential, single-ended capable
Digital Output Parallel CMOS —
Data Interface CMOS parallel —
Reference Type Internal (on-chip) —
封装 64-pin QFN (LP64) with exposed pad 64-pin QFN with Exposed Pad (EP)
安装类型 Surface Mount Surface Mount
Packaging Tray —
工作温度范围 [DATA_NEEDED: operating temperature range] —
RoHS 状态 [DATA_NEEDED: RoHS status] Compliant
Sample Rate (max) — 65 MSPS per channel
Architecture — Pipelined
Analog Supply Voltage — 3.3 V
Digital Output Supply — 1.8 V to 3.3 V
Digital Output Interface — Parallel CMOS
Data Rate (per channel) — Up to 65 MSPS
Reference — Internal bandgap; external reference supported
Sample-Rate Family — 20 / 40 / 65 / 80 MSPS (per datasheet family)
工作温度 — -40 C to +85 C (industrial)

数据手册与资源

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