CDK2308CILP64 vs CDK2308BILP64 对比

详细并排对比 CDK2308CILP64 出自 MaxLinear 和 CDK2308BILP64 出自 MaxLinear。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

MaxLinear
CDK2308BILP64 CDK2308BILP64 - Dual 10-bit 40MSPS ADC | MaxLinear (Cadeka)

CDK2308BILP64 - Dual 10-bit 40MSPS ADC | MaxLinear (Cadeka)

CDK2308BILP64 ✓ 量产中

规格对比

参数 CDK2308CILP64 CDK2308BILP64
品牌 MaxLinear MaxLinear
分类 ADC/DAC ADC/DAC
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $10.85 $7.25
分辨率 10 bit 10 bit
Number of Channels 2 (dual) 2 (dual)
Sample Rate (max) 65 MSPS per channel —
Architecture Pipelined Pipelined with on-chip track-and-hold
Input Type Differential, single-ended capable Differential analog input
Analog Supply Voltage 3.3 V —
Digital Output Supply 1.8 V to 3.3 V —
Digital Output Interface Parallel CMOS —
Data Rate (per channel) Up to 65 MSPS —
Reference Internal bandgap; external reference supported —
Sample-Rate Family 20 / 40 / 65 / 80 MSPS (per datasheet family) —
封装 64-pin QFN with Exposed Pad (EP) 64-pin QFN (LP), 9x9 mm with exposed pad
安装类型 Surface Mount Surface Mount
工作温度 -40 C to +85 C (industrial) —
RoHS 状态 Compliant Compliant
Sample Rate (B grade) — 40 MSPS per channel
Family Speed Grades — 20 / 40 / 65 / 80 MSPS (A/B/C/D grades)
Input Bandwidth — Up to 100 MHz IF (full-power)
电源电压 — 3.3 V (analog and digital)
Power Consumption — [DATA_NEEDED: total power at 40 MSPS]
Power-Down Modes — Per-channel, standby, full power-down
Output Interface — Parallel CMOS
工作温度范围 — [DATA_NEEDED: industrial / extended range]
MSL 等级 — [DATA_NEEDED: MSL rating]
Lead-Free — Yes
Datasheet Document — Cadeka / Exar CDK2308 family datasheet (15 pages)

数据手册与资源

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