EP1K100QI208-2N vs EP1K100QI208-2 对比
详细并排对比 EP1K100QI208-2N 出自 Altera 和 EP1K100QI208-2 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP1K100QI208-2N | EP1K100QI208-2 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $0.00 | $23.90 |
| Series | ACEX-1K | — |
| FPGA Family | ACEX-1K | — |
| Number of Logic Elements/Cells | 4992 | — |
| Number of LABs/CLBs | 624 | — |
| Total RAM Bits | 49152 | — |
| Number of User I/O | 147 | — |
| 封装 / 外壳 | 208-BFQFP | — |
| 安装类型 | Surface Mount | Surface Mount |
| Core Supply Voltage | 2.5 V | — |
| Speed Grade | -2 | — |
| Temperature Grade | I (industrial) | — |
| System Gates | 257000 | 100,000 |
| Typical Gate Count | 100K gates (family) | — |
| 工作温度范围 | [DATA_NEEDED: exact industrial temperature limits from ACEX-1K datasheet] | — |
| Max User I/O in 208-BFQFP | 147 | — |
| Total Number of Configuration Bits | [DATA_NEEDED: configuration bitstream size] | — |
| Maximum Internal Clock Frequency | [DATA_NEEDED: clock frequency for -2 speed grade] | — |
| I/O Standard Support | [DATA_NEEDED: supported I/O standards] | — |
| PLL/Clock Management | [DATA_NEEDED: PLL availability on EP1K100] | — |
| RoHS 状态 | [DATA_NEEDED: manufacturer RoHS certificate] | [DATA_NEEDED: RoHS compliance status] |
| Family | — | ACEX-1K |
| Logic Elements | — | 4,992 cells |
| Logic Array Blocks (LABs) | — | 624 |
| Embedded Memory (EAB) | — | 49,152 bits |
| User I/Os | — | 147 |
| Maximum Operating Frequency | — | 250 MHz |
| Core Voltage (VCCINT) | — | 2.5 V |
| Process Technology | — | 0.22 umm CMOS SRAM |
| 封装 | — | 208-pin PQFP (BFQFP) |
| Pitch | — | 0.5 mm |
| 工作温度 | — | -40C to +85C (Industrial) |
| Configuration Interface | — | JTAG (IEEE 1149.1) / serial / EPC2 |
| Global Clock Networks | — | 4 |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, 5V tolerant |