EP1S10F672I7N vs EP1S10F672C7 对比
详细并排对比 EP1S10F672I7N 出自 Intel 和 EP1S10F672C7 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP1S10F672I7N | EP1S10F672C7 |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $118.00 | $158.00 |
| Family | Stratix | Stratix |
| Logic Elements | 10,570 | 10,570 |
| Logic Array Blocks (LABs) | 1,057 | — |
| User I/Os | 345 | 345 |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Supply Voltage | 1.5 V | — |
| Maximum Internal Frequency | 420.17 MHz | — |
| 工作温度 | 0C to 85C | 0 C to 85 C (Commercial) |
| 封装 | 672-ball FineLine BGA, 35 x 35 mm, 1.27 mm pitch | 672-pin FBGA (FineLine BGA) |
| Logic Family | CMOS | — |
| Embedded Memory | 920 Kbits (TriMatrix) | 920,448 bits |
| DSP Blocks | Yes (dedicated) | — |
| Configuration Interface | Active Serial / Passive Serial / JTAG | — |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| Speed Grade | I7 (industrial, -7 speed bin) | — |
| MSL 等级 | 3 (per JEDEC J-STD-020, typical for BGA of this era) | — |
| 安装类型 | Surface Mount (BGA) | Surface Mount |
| RoHS 状态 | [DATA_NEEDED: per Intel PDN] | unknown |
| Package Dimensions | — | 35 x 35 mm, 1.27 mm pitch |
| Core Voltage (VCCINT) | — | 1.5 V |
| Logic Cells | — | 10,570 |
| LABs (Logic Array Blocks) | — | 1,057 |
| I/O Standards | — | LVTTL, LVCMOS, LVDS, SSTL, HSTL |
| Configuration Mode | — | JTAG, Passive Serial, Active Serial |