EP1SGX25DF1020C6B vs EP1SGX25DF1020C6ESL 对比

详细并排对比 EP1SGX25DF1020C6B 出自 Altera 和 EP1SGX25DF1020C6ESL 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1SGX25DF1020C6B EP1SGX25DF1020C6ESL
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $175.00 $1,095.00
Series Stratix GX —
Family EP1SGX25 Stratix GX
Logic Elements 25,660 25,660
Total Memory Bits 1,944,576 —
User I/O Count 607 —
封装 1020-BBGA (33 × 33 mm, 1.0 mm pitch) 1020-BBGA (FineLine BGA)
Supply Voltage (Core) 1.5 V —
工作温度 0 °C to 85 °C (Commercial) —
Speed Grade C6 C6
安装类型 Surface Mount (BGA) Surface Mount
MSL 等级 [DATA_NEEDED: MSL rating] —
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Lead-Free Yes (per DigiChip package note) —
Transceivers Embedded high-speed serial transceivers (multi-gigabit) Embedded multi-gigabit transceivers (per Stratix GX family)
PLLs On-chip phase-locked loops for clock management —
DSP Blocks Hardware multipliers / DSP blocks Yes (embedded DSP blocks)
External Memory Support DDR, DDR2, SDR, QDR, QDRII SRAM —
Hard IP PCI Express (per Stratix GX family) —
Total RAM Bits — 1,944,576 bits
User I/O Pins — 607
LABs/CLBs — 2,566
Core Voltage — 1.5 V
工作结温 — 0 C to 85 C
Configuration Method — Passive Serial / Fast Passive Parallel / JTAG
Process Node — 0.13 um CMOS
I/O Standards Supported — LVTTL, LVCMOS, SSTL, HSTL, LVDS (per family)

数据手册与资源

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