EP1SGX25FF1020C6ES vs EP1SGX25FF1020 对比

详细并排对比 EP1SGX25FF1020C6ES 出自 Altera 和 EP1SGX25FF1020 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1SGX25FF1020C6ES EP1SGX25FF1020
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $192.40 $295.00
Product Type FPGA (Field-Programmable Gate Array) —
Family Stratix GX Stratix GX
Logic Elements 25,660 —
Logic Array Blocks (LABs) 2,566 —
Process Technology 130 nm CMOS 130 nm CMOS
Core Supply Voltage 1.5 V —
Multi-Gigabit Transceivers Up to 20 channels, 622 Mbps to 3.1875 Gbps —
封装 FC-FBGA-1020, 33 x 33 mm, 1 mm ball pitch 1020-ball FCBGA (PBGA, 1.00 mm pitch)
Logic Family CMOS —
Number of Pins / Balls 1020 —
工作温度 0 °C to +85 °C (commercial) -40C to +85C (industrial variant) / 0C to +85C (commercial variant)
安装类型 Surface Mount (BGA) Surface Mount (BGA)
Lead Free Yes —
Speed Grade C6 —
Ordering Suffix ES (engineering sample / extended reliability) —
Max Internal Clock Frequency [DATA_NEEDED: maximum Fmax] —
Embedded Memory TriMatrix (M512/M4K/M-RAM blocks) —
DSP Blocks Dedicated 18 x 18 multipliers Embedded dedicated multipliers
Logic Elements (LE) — 25,660
Configurable Logic Blocks (CLB) — 2,566
Embedded Memory (bits) — 1,944,576
Logic Cells (per FPGAkey) — 25,660
Combinatorial Delay (Tpd) — 7.49 ns (per Microchip USA datasheet summary)
Operating Frequency (max) — [DATA_NEEDED: max internal operating frequency]
Pin/Package Count — 1020
电源电压 — [DATA_NEEDED: core VCC voltage]
RoHS 状态 — [DATA_NEEDED: RoHS compliance status]
Serial Transceivers — Embedded SERDES (multi-gigabit, protocol-dependent)
PLL / Clock Management — Embedded PLLs
Configuration Method — SRAM-based, configuration via JTAG / passive serial / fast passive parallel

数据手册与资源

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