EP1SGX25FF800I5N vs EP1SGX25DF800I6N 对比

详细并排对比 EP1SGX25FF800I5N 出自 Altera 和 EP1SGX25DF800I6N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1SGX25FF800I5N EP1SGX25DF800I6N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 最后采购期
库存状态 有库存 有库存
单价(USD) $128.40 $1,450.00
Family Stratix GX Stratix GX
Logic Elements 25,660 [DATA_NEEDED: logic element count]
Embedded Memory (Bits) 1,922,048 —
High-Speed Transceiver Channels 4 to 20 —
Transceiver Data Rate (max) 3.1875 Gbps —
DSP Blocks Yes (multipliers) Up to 22 DSP blocks
PLLs [DATA_NEEDED: PLL count] —
User I/O Banks [DATA_NEEDED: I/O bank count] —
Maximum User I/O [DATA_NEEDED: max user I/O] —
封装 800-pin FineLine BGA (FBGA) 800-pin FineLine BGA (DF800)
工作温度范围 -40C to +100C (Industrial) —
Speed Grade -5 -6 (production grade)
Process Technology 130 nm CMOS —
电源电压 [DATA_NEEDED: VCCINT/VCCIO levels] —
Configuration Method JTAG / Passive Serial —
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Transceiver Channels — 4 to 20 channels
Maximum Transceiver Data Rate — 3.1875 Gbps per channel
CDR / SERDES — Embedded clock-data recovery and SERDES
Memory — TriMatrix memory, up to 2 Mbits
Hard IP — PCI Express PHY, external memory interfaces (DDR, DDR-II, QDR-II, RLDRAM-II)
Source-Synchronous Channels — 8 channels
I/O Standards — LVDS, LVTTL, LVCMOS, SSTL, HSTL
Temperature Range — Industrial -40C to +100C
Protocol Support — Gigabit Ethernet, SONET/SDH, PCI Express, custom serial

数据手册与资源

浏览全部产品 创建 BOM 获取报价