EP20K200EFC484-1 vs EP20K200EFC484-1N 对比
详细并排对比 EP20K200EFC484-1 出自 Altera 和 EP20K200EFC484-1N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP20K200EFC484-1 | EP20K200EFC484-1N |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $68.40 | $290.00 |
| Family | APEX 20KE | APEX-20KE |
| Logic Elements / Cells | 8320 | — |
| System Gates | 200000 | 200,000 |
| Embedded Memory (Bits) | 106496 | — |
| Maximum User I/O | 376 | 376 |
| Number of PLLs | 4 | — |
| Core Voltage | 1.8 V | — |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS |
| 封装 | 484-BGA (FineLine BGA) | 484-ball FineLine BGA (23 mm × 23 mm) |
| Package Ball Count | 484 | — |
| 安装类型 | Surface Mount | Surface Mount (BGA) |
| 工作温度 | -40 °C to +85 °C (industrial, inferred from grade code) | 0 °C to +85 °C (commercial) |
| I/O Standard Support | LVDS, PCI, LVTTL, LVCMOS, SSTL, HSTL | — |
| Programming Interface | IEEE 1149.1 JTAG, passive serial, passive parallel | IEEE 1149.1 JTAG |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS compliance] |
| MSL 等级 | [DATA_NEEDED: MSL moisture sensitivity level] | [DATA_NEEDED: MSL rating] |
| Logic Elements | — | 8,320 |
| Embedded RAM Bits | — | 106,496 |
| Core Voltage (VCCINT) | — | 1.8 V (1.71 V to 1.89 V) |
| I/O Voltage (VCCIO) | — | [DATA_NEEDED: VCCIO range] |
| Maximum Internal Frequency | — | 367 MHz |
| Propagation Delay | — | 2.5 ns (per digchip reference) |
| Speed Grade | — | -1 |