EP20K400FI672-2X vs EP20K400FI672-2N 对比
详细并排对比 EP20K400FI672-2X 出自 Intel 和 EP20K400FI672-2N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP20K400FI672-2X | EP20K400FI672-2N |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $171.00 | $188.75 |
| Family | APEX 20K | APEX 20K |
| Logic Elements | 16,640 | — |
| Typical Gates | 400,000 system gates | 400,000 |
| Embedded Memory | 212,992 bits | — |
| User I/O Pins | 496 | — |
| 封装 | 672-ball BGA (FI672) | 672-pin FC-FBGA (Flip-Chip Fine-pitch BGA) |
| Package Code | BGA | — |
| Terminal Form | Ball | — |
| No. of Terminals | 672 | — |
| Package Shape | Square | — |
| Speed Grade | -2X | -2 |
| 工作温度 | -40C to +85C (industrial) | Commercial (0 °C to +70 °C) [DATA_NEEDED: industrial variant] |
| Core Voltage | 1.8 V | 2.5 V |
| I/O Voltage Support | 1.8V / 2.5V / 3.3V / 5V (MultiVolt) | — |
| Configuration Method | SRAM (serial EPROM or JTAG) | — |
| JTAG Support | Yes (IEEE 1149.1) | — |
| Process Technology | 0.18 um CMOS, 6-metal | 0.22 µm CMOS |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance] | Compliant (lead-free) |
| Logic Elements / Cells | — | 16,640 |
| Maximum User I/O | — | 488 |
| Embedded Memory Bits | — | 212,992 bits |
| Embedded Array Blocks (EABs) | — | [DATA_NEEDED: EAB count per family datasheet] |
| Maximum Frequency | — | 200 MHz |
| Package Body Size | — | 27 x 27 mm |
| Terminal Pitch | — | 1.0 mm |
| Propagation Delay | — | 3.1 ns |
| 湿敏等级（MSL） | — | 3 |
| Peak Reflow Temperature | — | 220 °C |
| 安装类型 | — | Surface Mount |
| Configuration Modes | — | PS, PPS, PPA, JTAG |
| Supported I/O Standards | — | LVTTL, LVCMOS, SSTL, HSTL |