EP20K400FI672-3 vs EP20K400FI672-1 对比
详细并排对比 EP20K400FI672-3 出自 Altera 和 EP20K400FI672-1 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP20K400FI672-3 | EP20K400FI672-1 |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $195.00 | $92.00 |
| Family | APEX 20K | — |
| Series | EP20K400 | APEX 20K |
| Logic Elements | 16640 | 212,992 |
| Total Gates | up to 400000 | — |
| Embedded RAM | 212992 bits | — |
| Maximum User I/O | 502 | — |
| Dedicated Inputs | 6 | 4 |
| Propagation Delay | 3.6 ns | 2.5 ns |
| 最大时钟频率 | 833 MHz | — |
| Supply Voltage (Nominal) | 2.5 V | — |
| Supply Voltage Range | 2.375 V to 2.625 V | — |
| Process Technology | CMOS | CMOS |
| Package Type | PBGA (Plastic BGA) | — |
| Package Code | S-PBGA-B672 | — |
| Terminal Count | 672 | — |
| Terminal Pitch | 1.000 mm | — |
| Package Shape | Square BGA | — |
| 安装类型 | Surface Mount | — |
| Configuration Interface | JTAG (IEEE 1149.1) | — |
| 工作温度 | [DATA_NEEDED: operating temperature range] | Industrial (per 'I' suffix) |
| MSL 等级 | 3 | 3 |
| Peak Reflow Temperature | 220 C | 220 C |
| Device Family | — | APEX-20K Field Programmable Gate Array |
| Typical Gates | — | 400,000 |
| Logic Array Blocks (LABs) | — | 16,640 |
| User I/O Pins | — | 502 |
| Total Terminals | — | 672 |
| 封装 | — | 672-ball PBGA (FineLine BGA, 1.0 mm pitch) |
| Package Code (JEDEC) | — | S-PBGA-B672 |
| Core Supply Voltage (VCCINT) | — | 2.5 V nominal (2.375 V to 2.625 V) |
| Speed Grade | — | -1 |
| RoHS 状态 | — | [DATA_NEEDED: RoHS compliance] |