EP20K400GI655-3 vs EP20K400GI655-2 对比

详细并排对比 EP20K400GI655-3 出自 Altera 和 EP20K400GI655-2 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K400GI655-3 EP20K400GI655-2
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $55.00 $175.00
Family APEX 20KE —
Logic Elements / Cells 16,640 —
System Gates 400,000 (maximum) —
Maximum User I/O 502 496
Dedicated Inputs 4 6
Number of Terminals 655 655
封装 655-Pin PGA (Plastic/CPGA, square) SPGA-655 (47 mm x 47 mm)
JESD-30 Code S-CPGA-P655 —
Package Shape Square —
Form of Terminal PIN/PEG (through-hole) —
安装类型 Through-Hole (Socket) Through-Hole / Socket
Process Technology CMOS, 2.5V core —
Core Supply Voltage 2.5 V —
I/O Supply Voltage 2.5 V or 3.3 V (MultiVolt I/O) —
工作温度 0°C to 70°C (Industrial I grade) -40C to +85C (industrial)
Speed Grade -3 (slowest of the EP20K400 family) —
Configuration Modes Passive Serial, Passive Parallel Asynchronous, JTAG —
Embedded Memory Dual-port RAM via Embedded System Blocks (ESBs) Embedded System Blocks (ESBs)
JTAG / Boundary Scan IEEE 1149.1 compliant —
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Manufacturer — Altera Corporation
Series — APEX 20K (EP20K400)
Device Type — Field Programmable Gate Array (FPGA)
Typical Gate Count — 400,000 gates
Logic Elements (LE) — 16,640
Nominal Supply Voltage — 2.5 V
Supply Voltage Range — 2.375 V to 2.625 V
Propagation Delay — 3.1 ns (typical)
Technology — CMOS SRAM
Moisture Sensitivity Level — 1 (per Altera family)
Configuration Method — JTAG, Passive Serial, Passive Parallel
I/O Standards Supported — LVTTL, LVCMOS, PCI, GTL+
生命周期状态 — Obsolete (legacy Altera APEX 20K family)

数据手册与资源

浏览全部产品 创建 BOM 获取报价