EP20K600CB652C9 vs EP20K600CB652C-8 对比

详细并排对比 EP20K600CB652C9 出自 Altera 和 EP20K600CB652C-8 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K600CB652C9 EP20K600CB652C-8
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $142.50 $86.00
Family APEX 20KC APEX 20KC (MultiCore)
Logic Elements / Cells 24,320 —
Number of LABs / CLBs 2,432 —
System Gates 1,537,000 —
Total RAM Bits 311,296 —
User I/O 488 —
Number of I/O Banks [DATA_NEEDED: I/O bank count] —
电源电压 1.71 V to 1.89 V —
Process Technology 0.15 µm all-layer copper CMOS —
Internal Datapath Frequency up to 250 MHz —
Propagation Delay (typ.) 1.48 ns —
工作温度 0 °C to 85 °C (commercial) 0 C to 85 C (commercial)
封装 652-BGA (45 × 45 mm, 1.27 mm pitch) 652-BGA (LBGA, 45 x 45 mm, 1.27 mm pitch)
安装类型 Surface Mount (BGA) Surface Mount (thermally enhanced)
Configuration JTAG IEEE 1149.1 / serial / EPC2-compatible Enhanced (EPC) bitstream
RoHS 状态 Compliant (per Altera product page) —
Product Status Obsolete (per distributor listings) —
Series — APEX 20KC
Typical Gates — 600,000
Logic Elements — 24,320
Embedded RAM — 311,296 bits
User I/Os — 488
Propagation Delay — 1.48 ns (per published source)
Speed Grade — -8 (slowest, most timing margin)
VCCIO Options — 1.8 V / 2.5 V / 3.3 V
Process — 0.15 µm all-layer copper metal
PCI Compliance — PCI Local Bus Rev 2.2 at 33/66 MHz, 32/64-bit
Memory Interface Support — DDR SDRAM, ZBT SRAM, QDR SRAM, LVDS

数据手册与资源

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