EP20K600CF672I8 vs EP20K600CF672C8N 对比

详细并排对比 EP20K600CF672I8 出自 Altera 和 EP20K600CF672C8N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K600CF672I8 EP20K600CF672C8N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 有效
库存状态 有库存 有库存
单价(USD) $195.00 $108.00
Family APEX 20KC APEX 20KC
Device Type SPLD / FPGA SPLD
Logic Elements / Cells 24,320 —
Macros (Logic Cells) 2432 —
Typical Gate Count 600,000 gates —
Embedded Memory 311,296 bits —
User I/Os 488 to 508 —
引脚数 652 (functional) / 672 (BGA balls) —
Propagation Delay (typical) 1.48 ns —
Internal Frequency (max) [DATA_NEEDED: max internal frequency in MHz] —
Core Supply Voltage 1.8 V —
Process Technology 0.15 µm all-layer copper —
工作温度 0 °C to +85 °C (Industrial) 0°C to 85°C
Package Type 672-ball BGA, 45 x 45 mm, 1.27 mm pitch —
安装类型 Surface Mount Surface mount
RoHS 状态 Compliant per legacy product records unknown
Configuration Interface JTAG / Passive Serial —
Design Tool Quartus II (legacy MAX+PLUS II) —
Product Type — FPGA / programmable logic device
Nominal Gate Capacity — 600K gates
Logic Elements or Cells — 24,320
Macros — 2,432
User I/O Count — 508
Package Terminals — 652 pins
封装 — BGA-652, 45 x 45 mm, 1.27 mm pitch
Package Description — 672-pin FC-FBGA
电源电压 — 1.8 V
Listed Frequency — 301.21 MHz
Propagation Delay — 1.48 ns
Fabrication Process — 0.15 µm
Interconnect Metal — All-layer copper metal
I/O Configuration — 508 user I/O
REACH Status — unknown
AEC-Q100 Qualification — unknown
Configuration Method — [DATA_NEEDED: configuration memory and programming method]
Core Current — [DATA_NEEDED: core supply current]
I/O Bank Voltage — [DATA_NEEDED: supported I/O voltage range]
Junction Temperature — [DATA_NEEDED: maximum junction temperature]
热阻 — [DATA_NEEDED: junction-to-ambient thermal resistance]

数据手册与资源

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