EP20K600CF672I9N vs EP20K600CF672I7N 对比

详细并排对比 EP20K600CF672I9N 出自 Intel 和 EP20K600CF672I7N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K600CF672I9N EP20K600CF672I7N
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $120.00 $232.00
Family APEX 20KC APEX 20KC
Logic Elements 24,320 cells 24,320
Typical Gates 600,000 —
Maximum Frequency 250 MHz —
Process Technology 0.15 µm CMOS —
Core Voltage (VCCINT) 1.8 V 1.8 V
I/O Voltage (VCCIO) [DATA_NEEDED: VCCIO range] 2.5 V / 3.3 V (MultiVolt, bank-dependent)
Embedded Memory 311,040 bits (approx. 38 KB) —
封装 672-ball FC-FBGA 672-ball FineLine BGA (FC-FBGA)
PLL Count [DATA_NEEDED: PLL count] —
User I/O Pins [DATA_NEEDED: max user I/O] —
Configuration Mode JTAG / Serial / Parallel —
Programming Interface IEEE 1149.1 JTAG —
工作温度 -40 °C to +85 °C (industrial) —
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance]
Technology — 0.15 µm CMOS
Maximum System Gates — 600,000
Maximum User I/O Pins — 508
Maximum Internal Frequency — 376 MHz
Embedded System Blocks (ESBs) — 160
Total Embedded RAM (max) — 311,296 bits
Ball Pitch — 1.0 mm
Package Body Size — 27 mm × 27 mm
Speed Grade — I7 (-40 °C to +100 °C industrial)
Propagation Delay (typical) — 1.6 ns
Configuration Method — JTAG (IEEE 1149.1) + EPC configuration device
Lead-Free Finish (N suffix) — Yes

数据手册与资源

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