EP20K60ETC144-2N vs EP20K60EFC144-2XN 对比

详细并排对比 EP20K60ETC144-2N 出自 Intel 和 EP20K60EFC144-2XN 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K60ETC144-2N EP20K60EFC144-2XN
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $65.00 $152.00
Family APEX-20KE APEX-20K (MultiCore Architecture)
Logic Elements 2,560 —
Typical Gates 60,000 —
Embedded Memory (ESB) 32,768 bits (32 Kbits) —
User I/Os 92 —
Core Voltage (VCCINT) 1.71 V to 1.89 V (1.8 V nominal) —
Speed Grade -2 -2 (per MPN suffix)
Internal Frequency (max) 160 MHz —
Propagation Delay 1.72 ns —
Process Technology 0.22 µm CMOS —
封装 144-pin TQFP (20 × 20 mm, 0.5 mm pitch) —
工作温度 0 °C to 85 °C (commercial) —
安装类型 Surface Mount Surface Mount
Logic Family CMOS CMOS, SRAM-based LUT
JTAG Support IEEE 1149.1 boundary-scan —
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Series — APEX-20KE
Typical Gate Count — 60,000 gates
Logic Elements / Embedded Array Blocks — 2,560
Embedded Memory (Bits) — 32,768
Maximum User I/O — 93
Number of I/O Banks — [DATA_NEEDED: number of I/O banks]
Core Supply Voltage (VCCINT) — 1.71 V to 1.89 V
I/O Supply Voltage (VCCIO) — [DATA_NEEDED: VCCIO range]
Package Type — 144-BGA (Fine-pitch Ball Grid Array)
Package Code (per MPN suffix) — FBGA / LBGA, 13x13 mm
Operating Temperature (TJ) — 0 C to +85 C (commercial)
Configuration Method — JTAG (IEEE 1149.1), Passive Serial, Parallel

数据手册与资源

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