EP2A25F672I6 vs EP2A25F672C7 对比
详细并排对比 EP2A25F672I6 出自 Intel 和 EP2A25F672C7 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP2A25F672I6 | EP2A25F672C7 |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $178.00 | $118.00 |
| Family | APEX II | — |
| Logic Elements (typical gates) | 25,000 | — |
| Fabric Architecture | SRAM-based LUT | — |
| Process Technology | 0.18 µm CMOS | 0.15-um all-layer copper, up to 8 metal layers |
| 封装 | 672-ball FineLine BGA (FBGA-672) | 672-ball FCBGA (FineLine BGA) |
| Core Voltage | 1.5 V | — |
| Configuration Method | External SRAM configuration device (EPC series) | — |
| Temperature Grade | Industrial (-40 °C to +100 °C ambient) | — |
| Speed Grade | 6 | -7 |
| Embedded Memory | Embedded System Blocks (ESB), dual-port RAM / CAM | — |
| DSP Blocks | MultiCore dedicated multipliers | — |
| Boundary Scan | JTAG (IEEE 1149.1) compliant | — |
| Clock Management | Dedicated PLL / clock tree circuitry | — |
| I/O Bank Count | [DATA_NEEDED: number of user I/O banks] | — |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| MSL 等级 | [DATA_NEEDED: moisture sensitivity level] | — |
| 安装类型 | Surface Mount (BGA) | — |
| Product Family | — | APEX II |
| Logic Elements | — | 25,000 |
| Maximum System Gates | — | 1,650,000 |
| Maximum RAM Bits | — | 422,976 |
| User I/O Count | — | 492 |
| Supply Voltage (Core) | — | 1.5 V |
| LVDS Data Rate | — | 1 Gbps per channel (True-LVDS) |
| I/O Standards Supported | — | LVDS, LVPECL, PCML, HyperTransport |
| 工作温度 | — | 0C to +85C (Commercial) |
| Configuration Mode | — | Passive Serial, Passive Parallel, JTAG |
| Embedded System Blocks (ESB) | — | Yes - RAM, ROM, CAM, multiplier support |