EP2A25F672I9 vs EP2A25F672I6 对比

详细并排对比 EP2A25F672I9 出自 Intel 和 EP2A25F672I6 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP2A25F672I9 EP2A25F672I6
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $135.00 $178.00
Family APEX II APEX II
Manufacturer Intel (formerly Altera) —
Logic Elements (LEs) 24,320 —
System Gates (typical) 900,000 —
Maximum Operating Frequency 236 MHz —
Process Technology 0.15 µm CMOS 0.18 µm CMOS
Core Voltage (VCCINT) 1.5 V —
封装 672-pin FC-FBGA 672-ball FineLine BGA (FBGA-672)
引脚数量 672 —
Temperature Grade Industrial (-40 °C to +100 °C) Industrial (-40 °C to +100 °C ambient)
Speed Grade 9 (fastest APEX II grade) 6
Embedded System Blocks (ESBs) Yes (dual-port RAM/ROM) —
Maximum User I/O [DATA_NEEDED: max user I/O pin count] —
Maximum Memory Bits 422,400 bits —
PLLs 4 —
安装类型 Surface Mount (flip-chip BGA) Surface Mount (BGA)
Peak Reflow Temperature 220 °C (per distributor listing) —
湿敏等级(MSL) 3 —
RoHS 状态 Unknown (legacy 2000s part; verify lot certificate) [DATA_NEEDED: RoHS compliance status]
Logic Elements (typical gates) — 25,000
Fabric Architecture — SRAM-based LUT
Core Voltage — 1.5 V
Configuration Method — External SRAM configuration device (EPC series)
Embedded Memory — Embedded System Blocks (ESB), dual-port RAM / CAM
DSP Blocks — MultiCore dedicated multipliers
Boundary Scan — JTAG (IEEE 1149.1) compliant
Clock Management — Dedicated PLL / clock tree circuitry
I/O Bank Count — [DATA_NEEDED: number of user I/O banks]
Lead-Free — [DATA_NEEDED: lead-free status]
MSL 等级 — [DATA_NEEDED: moisture sensitivity level]

数据手册与资源

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