EP2AGZ300FF35C4N vs EP2AGZ300FF35C3G 对比
详细并排对比 EP2AGZ300FF35C4N 出自 Altera 和 EP2AGZ300FF35C3G 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP2AGZ300FF35C4N | EP2AGZ300FF35C3G |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $1,350.00 | $1,395.00 |
| Series | Arria II GZ | Arria II GZ |
| Logic Elements | 298,000 | 300,000 |
| Logic Array Blocks (LABs) | 11,920 | — |
| Embedded Memory (bits) | 18,854,912 (~17.9 Mbit) | — |
| User I/O Count | 554 | — |
| Number of I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Process Technology | 40 nm | 40 nm TSMC |
| Core Voltage | 0.9 V | — |
| Package Type | 1152-BBGA, FCBGA (flip-chip) | — |
| Terminal Form | Ball | — |
| Package Code (JEDEC) | HBGA | — |
| Operating Temperature Grade | Commercial (C4 = 0C to +85C) | — |
| Configuration Memory | SRAM-based (volatile, requires boot device) | — |
| Transceivers | Multi-gigabit transceivers integrated | 16 channels, up to 6.375 Gbps |
| DSP Blocks | [DATA_NEEDED: number of DSP blocks] | 16-bit x 18-bit x 18-bit multipliers, integer/fractional modes |
| PLLs | [DATA_NEEDED: PLL count] | — |
| RoHS 状态 | Compliant (per Besenchips / DigiKey listing) | Compliant |
| Lead-Free Status | Lead free (per Besenchips listing) | — |
| 安装类型 | Surface Mount | — |
| Maximum Operating Frequency | 500 MHz | — |
| Adaptive Logic Modules (ALMs) | — | 119,088 |
| Embedded Memory | — | 17,133 Kbit |
| Hard PCIe Controllers | — | Up to 12 (Gen2 endpoint/root-port) |
| User I/Os | — | 1,288 |
| I/O Banks | — | 12 |
| 封装 | — | FCBGA-1152 (35 mm) |
| Package Family | — | BGA (Flip-Chip) |
| Temperature Grade | — | Commercial (0 C to 85 C junction) |
| Speed Grade | — | 3 (mid-performance) |
| Configuration Method | — | Quartus II/Prime, JTAG, Passive Serial, Fast Passive Parallel |
| Hard Memory Controller | — | DDR3 up to 800 MHz, DDR2, QDR II+ |