EP2S30F672I4 vs EP2S30F672C4 对比

详细并排对比 EP2S30F672I4 出自 Intel 和 EP2S30F672C4 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP2S30F672I4 EP2S30F672C4
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $695.00 $498.43
Series Stratix II Stratix II
Manufacturer Intel (formerly Altera) Intel (formerly Altera)
Logic Elements 33880 —
Logic Array Blocks (LABs) 1694 —
Total RAM Bits 1369728 1,369,728
Number of I/O 500 500
DSP Blocks 12 (per datasheet, family range) —
Number of PLLs 6 [DATA_NEEDED: PLL count for S30 tier]
Voltage - Supply 1.2 V core, separate I/O bank VCCIO —
工作温度 -40C to +100C (Industrial) 0C to +85C (commercial, 'C' speed grade)
安装类型 Surface Mount Surface Mount
封装 / 外壳 672-BBGA, FCBGA (FBGA-672) —
Package Dimensions 35 x 35 mm —
Ball Pitch 1.0 mm —
Process Technology 90 nm CMOS 90 nm
Configuration JTAG, serial, parallel (Stratix II scheme) —
MSL 等级 3 (per JEDEC J-STD-020) —
RoHS 状态 [DATA_NEEDED: confirm RoHS compliance on part label] Compliant
Logic Elements / Cells — 33,880
封装 — 672-BBGA, FCBGA (27x27 mm)
Core Voltage - Supply — 1.15 V to 1.25 V
Maximum Core Frequency (datasheet benchmark) — 711 MHz
Embedded DSP Blocks — 16 (Stratix II S30 tier)
Number of Global Clock Networks — [DATA_NEEDED: global clock network count]
Lead-Free — Yes

数据手册与资源

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