EP2S30F672I4 vs EP2S30F672C5N 对比
详细并排对比 EP2S30F672I4 出自 Intel 和 EP2S30F672C5N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP2S30F672I4 | EP2S30F672C5N |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $695.00 | $450.00 |
| Series | Stratix II | Stratix II |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements | 33880 | 33,880 |
| Logic Array Blocks (LABs) | 1694 | 1694 |
| Total RAM Bits | 1369728 | — |
| Number of I/O | 500 | — |
| DSP Blocks | 12 (per datasheet, family range) | [DATA_NEEDED: DSP block count] |
| Number of PLLs | 6 | 4 |
| Voltage - Supply | 1.2 V core, separate I/O bank VCCIO | — |
| 工作温度 | -40C to +100C (Industrial) | — |
| 安装类型 | Surface Mount | — |
| 封装 / 外壳 | 672-BBGA, FCBGA (FBGA-672) | — |
| Package Dimensions | 35 x 35 mm | — |
| Ball Pitch | 1.0 mm | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Configuration | JTAG, serial, parallel (Stratix II scheme) | — |
| MSL 等级 | 3 (per JEDEC J-STD-020) | — |
| RoHS 状态 | [DATA_NEEDED: confirm RoHS compliance on part label] | — |
| Family Name | — | Stratix II |
| Embedded Memory (bits) | — | 1,369,728 |
| User I/O Count | — | 500 |
| 封装 | — | 672-ball FBGA (FineLine BGA) |
| Speed Grade | — | C5 (-5 commercial) |
| Supply Voltage (Core) | — | [DATA_NEEDED: core VCC value] |
| 工作温度范围 | — | Commercial (0C to +85C) |
| Global Clock Networks | — | 16 |
| Configuration Method | — | Serial / Passive Parallel / Fast Passive Parallel |
| Lead-Free / RoHS | — | Yes (N suffix) |
| Architecture | — | Adaptive Logic Module (ALM) |
| Multipliers | — | [DATA_NEEDED: 18x18 multiplier count] |