EP2SGX130GF40C5ES vs EP2SGX130GF40C4NES 对比

详细并排对比 EP2SGX130GF40C5ES 出自 Altera 和 EP2SGX130GF40C4NES 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。

Altera

EP2SGX130GF40C5ES - Stratix II GX 132K LC FPGA, FC-FBGA-1508 | Altera

EP2SGX130GF40C5ES ⚠ 最后一次采购

Intel

EP2SGX130GF40C4NES ⚠ 最后一次采购

参数	EP2SGX130GF40C5ES	EP2SGX130GF40C4NES
品牌	Altera	Intel
分类	FPGA & CPLD	FPGA & CPLD
生命周期状态	最后采购期	最后采购期
库存状态	有库存	有库存
单价（USD）	$1,380.00	$1,380.00
Family	Stratix II GX	Stratix II GX
Logic Elements	132,540	132,540
Logic Array Blocks (LABs)	7,047	—
Internal Frequency (max)	609.76 MHz	—
Process Technology	90 nm CMOS	90 nm CMOS
Core Supply Voltage (nominal)	1.2 V	—
Speed Grade	C5 (mid-upper)	C4 (speed grade -4)
工作温度	0C to +85C (Commercial Extended)	Commercial Extended (per N suffix)
封装	FC-FBGA-1508 (40 x 40 mm, 1 mm pitch)	—
Ball Count	1508	—
Package Type	Flip-Chip Fine-pitch BGA	—
安装类型	Surface Mount	Surface Mount (flip-chip BGA)
Lead-Free / Halogen-Free	Yes (G suffix)	—
RoHS 状态	Compliant	—
Configuration Interface	JTAG / Passive Serial / Active Serial	—
Logic Blocks / ALMs	—	Approximately 53,000 ALMs
Core Voltage	—	1.2 V
Maximum Transceiver Data Rate	—	6.375 Gbps
Transceiver Channels	—	Up to 20 (4 to 20, device-dependent)
User I/O Pins	—	734
Total Package Pins	—	1508 (FC-FBGA ball grid)
Package Code	—	GF40 (FC-FBGA, 40x40 mm, 1.0 mm pitch)
Internal Operating Frequency	—	Up to 717 MHz
Embedded Memory	—	Approximately 4.5 Mbits (TriMatrix)
PLL Blocks	—	8
DSP Blocks	—	Yes (variable, see datasheet)
Lead-Free / RoHS	—	Yes (LEAD FREE per datasheet family code)
MSL 等级	—	Per JEDEC J-STD-020, typically MSL-4 or higher [DATA_NEEDED: exact MSL level]
JEDEC Standard Reference	—	MS-034AAU-1