EP2SGX130GF40C5ES vs EP2SGX130GF40C4NES Comparaison
Comparaison détaillée côte à côte de EP2SGX130GF40C5ES par Altera et EP2SGX130GF40C4NES par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EP2SGX130GF40C5ES - Stratix II GX 132K LC FPGA, FC-FBGA-1508 | Altera
EP2SGX130GF40C5ES ⚠ Dernier achatIntel
EP2SGX130GF40C4NES - 132K LE Stratix II GX FPGA, 6.375Gbps SERDES, 1508-FBGA | Intel
EP2SGX130GF40C4NES ⚠ Dernier achatComparaison des spécifications
| Paramètre | EP2SGX130GF40C5ES | EP2SGX130GF40C4NES |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $1 380,00 | $1 380,00 |
| Family | Stratix II GX | Stratix II GX |
| Logic Elements | 132,540 | 132,540 |
| Logic Array Blocks (LABs) | 7,047 | — |
| Internal Frequency (max) | 609.76 MHz | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Core Supply Voltage (nominal) | 1.2 V | — |
| Speed Grade | C5 (mid-upper) | C4 (speed grade -4) |
| Température de fonctionnement | 0C to +85C (Commercial Extended) | Commercial Extended (per N suffix) |
| Boîtier | FC-FBGA-1508 (40 x 40 mm, 1 mm pitch) | — |
| Ball Count | 1508 | — |
| Package Type | Flip-Chip Fine-pitch BGA | — |
| Type de montage | Surface Mount | Surface Mount (flip-chip BGA) |
| Lead-Free / Halogen-Free | Yes (G suffix) | — |
| Statut RoHS | Compliant | — |
| Configuration Interface | JTAG / Passive Serial / Active Serial | — |
| Logic Blocks / ALMs | — | Approximately 53,000 ALMs |
| Core Voltage | — | 1.2 V |
| Maximum Transceiver Data Rate | — | 6.375 Gbps |
| Transceiver Channels | — | Up to 20 (4 to 20, device-dependent) |
| User I/O Pins | — | 734 |
| Total Package Pins | — | 1508 (FC-FBGA ball grid) |
| Package Code | — | GF40 (FC-FBGA, 40x40 mm, 1.0 mm pitch) |
| Internal Operating Frequency | — | Up to 717 MHz |
| Embedded Memory | — | Approximately 4.5 Mbits (TriMatrix) |
| PLL Blocks | — | 8 |
| DSP Blocks | — | Yes (variable, see datasheet) |
| Lead-Free / RoHS | — | Yes (LEAD FREE per datasheet family code) |
| Niveau MSL | — | Per JEDEC J-STD-020, typically MSL-4 or higher [DATA_NEEDED: exact MSL level] |
| JEDEC Standard Reference | — | MS-034AAU-1 |